516 lines
12 KiB
C
516 lines
12 KiB
C
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#ifndef __C64__
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#ifdef __AVR__
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#endif
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#define asm asm volatile
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#endif
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#include "can.h"
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#include "spi.h"
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#define spi_clear_ss() SPI_PORT |= (1<<SPI_PIN_SS)
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#define spi_set_ss() SPI_PORT &= ~(1<<SPI_PIN_SS)
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//Registers
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#define RXF0SIDH 0x00
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#define RXF0SIDL 0x01
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#define RXF0EID8 0x02
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#define RXF0EID0 0x03
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#define RXF1SIDH 0x04
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#define RXF1SIDL 0x05
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#define RXF1EID8 0x06
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#define RXF1EID0 0x07
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#define RXF2SIDH 0x08
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#define RXF2SIDL 0x09
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#define RXF2EID8 0x0A
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#define RXF2EID0 0x0B
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#define BFPCTRL 0x0C
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#define TXRTSCTRL 0x0D
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#define CANSTAT 0x0E
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#define CANCTRL 0x0F
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#define RXF3SIDH 0x10
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#define RXF3SIDL 0x11
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#define RXF3EID8 0x12
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#define RXF3EID0 0x13
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#define RXF4SIDH 0x14
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#define RXF4SIDL 0x15
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#define RXF4EID8 0x16
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#define RXF4EID0 0x17
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#define RXF5SIDH 0x18
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#define RXF5SIDL 0x19
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#define RXF5EID8 0x1A
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#define RXF5EID0 0x1B
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#define TEC 0x1C
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#define REC 0x1D
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#define RXM0SIDH 0x20
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#define RXM0SIDL 0x21
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#define RXM0EID8 0x22
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#define RXM0EID0 0x23
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#define RXM1SIDH 0x24
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#define RXM1SIDL 0x25
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#define RXM1EID8 0x26
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#define RXM1EID0 0x27
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#define CNF3 0x28
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#define CNF2 0x29
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#define CNF1 0x2A
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#define CANINTE 0x2B
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#define MERRE 7
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#define WAKIE 6
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#define ERRIE 5
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#define TX2IE 4
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#define TX1IE 3
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#define TX0IE 2
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#define RX1IE 1
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#define RX0IE 0
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#define CANINTF 0x2C
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#define MERRF 7
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#define WAKIF 6
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#define ERRIF 5
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#define TX2IF 4
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#define TX1IF 3
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#define TX0IF 2
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#define RX1IF 1
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#define RX0IF 0
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#define EFLG 0x2D
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#define TXB0CTRL 0x30
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#define TXREQ 3
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#define TXB0SIDH 0x31
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#define TXB0SIDL 0x32
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#define EXIDE 3
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#define TXB0EID8 0x33
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#define TXB0EID0 0x34
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#define TXB0DLC 0x35
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#define TXB0D0 0x36
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#define RXB0CTRL 0x60
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#define RXM1 6
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#define RXM0 5
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#define RXRTR 3
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// Bits 2:0 FILHIT2:0
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#define RXB0SIDH 0x61
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#define RXB0SIDL 0x62
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#define RXB0EID8 0x63
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#define RXB0EID0 0x64
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#define RXB0DLC 0x65
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#define RXB0D0 0x66
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//Command Bytes
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#define RESET 0xC0
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#define READ 0x03
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#define READ_RX_BUFFER 0x90
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#define WRITE 0x02
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#define LOAD_TX_BUFFER 0x40
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#define RTS 0x80
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#define READ_STATUS 0xA0
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#define RX_STATUS 0xB0
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#define BIT_MODIFY 0x05
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typedef struct{
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can_message msg;
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volatile unsigned char flags;
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}can_message_x;
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/* MCP */
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void mcp_reset();
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void mcp_write(unsigned char reg, unsigned char data);
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//void mcp_write_b(unsigned char reg, unsigned char *buf, unsigned char len);
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unsigned char mcp_read(unsigned char reg);
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//void mcp_read_b(unsigned char reg, unsigned char *buf, unsigned char len);
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void mcp_bitmod(unsigned char reg, unsigned char mask, unsigned char val);
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unsigned char mcp_status();
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//unsigned char mcp_rx_status();
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#ifdef __AVR__
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// Functions
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/*
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unsigned char mcp_rx_status() {
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unsigned char d;
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spi_set_ss();
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spi_data(RX_STATUS);
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d = spi_data(0);
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spi_clear_ss();
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return d;
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}
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*/
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unsigned char mcp_status() {
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unsigned char d;
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spi_set_ss();
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spi_data(READ_STATUS);
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d = spi_data(0);
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spi_clear_ss();
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return d;
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}
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void mcp_bitmod(unsigned char reg, unsigned char mask, unsigned char val) {
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spi_set_ss();
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spi_data(BIT_MODIFY);
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spi_data(reg);
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spi_data(mask);
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spi_data(val);
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spi_clear_ss();
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}
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//load a message to mcp2515 and start transmission
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void message_load(can_message_x * msg) {
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unsigned char x;
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spi_set_ss();
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spi_data(WRITE);
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spi_data(TXB0SIDH);
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spi_data(((unsigned char)(msg->msg.port_src << 2)) |
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(msg->msg.port_dst >> 4));
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spi_data((unsigned char)((msg->msg.port_dst & 0x0C) << 3) |
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(1<<EXIDE) | (msg->msg.port_dst & 0x03));
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spi_data(msg->msg.addr_src);
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spi_data(msg->msg.addr_dst);
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spi_data(msg->msg.dlc);
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for(x=0;x<msg->msg.dlc;x++) {
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spi_data(msg->msg.data[x]);
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}
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spi_clear_ss();
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spi_set_ss();
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spi_data(WRITE);
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spi_data(TXB0CTRL);
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spi_data((1<<TXREQ));
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spi_clear_ss();
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}
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//get a message from mcp2515 and disable RX interrupt Condition
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void message_fetch(can_message_x * msg) {
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unsigned char tmp1, tmp2, tmp3;
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unsigned char x;
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spi_set_ss();
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spi_data(READ);
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spi_data(RXB0SIDH);
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tmp1 = spi_data(0);
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msg->msg.port_src = tmp1 >> 2;
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tmp2 = spi_data(0);
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tmp3 = (unsigned char)((unsigned char)(tmp2 >> 3) & 0x0C);
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msg->msg.port_dst = ((unsigned char)(tmp1 <<4 ) & 0x30) | tmp3 |
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(unsigned char)(tmp2 & 0x03);
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msg->msg.addr_src = spi_data(0);
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msg->msg.addr_dst = spi_data(0);
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msg->msg.dlc = spi_data(0) & 0x0F;
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for(x=0;x<msg->msg.dlc;x++) {
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msg->msg.data[x] = spi_data(0);
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}
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spi_clear_ss();
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mcp_bitmod(CANINTF, (1<<RX0IF), 0x00);
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}
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#ifdef CAN_INTERRUPT
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static can_message_x RX_BUFFER[CAN_RX_BUFFER_SIZE],
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TX_BUFFER[CAN_TX_BUFFER_SIZE];
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unsigned char RX_HEAD=0;volatile unsigned char RX_TAIL=0;
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unsigned char TX_HEAD= 0;volatile unsigned char TX_TAIL=0;
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static volatile unsigned char TX_INT;
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ISR(INT0_vect) {
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unsigned char status = mcp_status();
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if ( status & 0x01 ) { // Message in RX0
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if ( !(((can_message_x*)&RX_BUFFER[RX_HEAD])->flags & 0x01) ) {
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message_fetch(&RX_BUFFER[RX_HEAD]);
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RX_BUFFER[RX_HEAD].flags |= 0x01;//mark buffer as used
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if( ++RX_HEAD == CAN_RX_BUFFER_SIZE) RX_HEAD = 0;
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}else{
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//buffer overflow
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//just clear the Interrupt condition, and lose the message
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mcp_bitmod(CANINTF, (1<<RX0IF), 0x00);
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}
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} else if ( status & 0x08 ) { // TX1 empty
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if(((can_message_x*)&TX_BUFFER[TX_TAIL])->flags & 0x01) {
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((can_message_x*)&TX_BUFFER[TX_TAIL])->flags &= ~0x01;
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TX_INT = 1;
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message_load(&TX_BUFFER[TX_TAIL]);
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if(++TX_TAIL == CAN_TX_BUFFER_SIZE) TX_TAIL = 0;
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}else{
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TX_INT = 0;
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}
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mcp_bitmod(CANINTF, (1<<TX0IF), 0x00);
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} else {
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#ifdef CAN_HANDLEERROR
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status = mcp_read(EFLG);
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if(status) { // we've got a error condition
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can_error = status;
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mcp_write(EFLG, 0);
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}
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#endif // CAN_HANDLEERROR
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}
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}
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#endif
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void mcp_reset() {
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spi_set_ss();
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spi_data(RESET);
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spi_clear_ss();
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}
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void mcp_write(unsigned char reg, unsigned char data) {
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spi_set_ss();
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spi_data(WRITE);
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spi_data(reg);
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spi_data(data);
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spi_clear_ss();
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}
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/*
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void mcp_write_b(unsigned char reg, unsigned char *buf, unsigned char len) {
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unsigned char x;
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spi_set_ss();
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spi_data(WRITE);
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spi_data(reg);
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for(x=0;x<len;x++) {
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spi_data(buf[x]);
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}
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spi_clear_ss();
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}
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*/
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unsigned char mcp_read(unsigned char reg) {
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unsigned char d;
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spi_set_ss();
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spi_data(READ);
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spi_data(reg);
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d = spi_data(0);
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spi_clear_ss();
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return d;
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}
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/*
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void mcp_read_b(unsigned char reg, unsigned char *buf, unsigned char len) {
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unsigned char x;
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spi_set_ss();
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spi_data(READ);
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spi_data(reg);
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for(x=0;x<len;x++) {
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buf[x] = spi_data(0);
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}
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spi_clear_ss();
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}
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*/
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/* Management */
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void can_setmode(can_mode_t mode) {
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unsigned char val = mode << 5;
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val |= 0x04; // CLKEN
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mcp_write( CANCTRL, val );
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}
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void can_setfilter() {
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//RXM1 RXM0
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// 0 0 receive matching filter
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// 0 1 " only 11bit Identifier
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// 1 0 " only 29bit Identifier
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// 1 1 any
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mcp_write(RXB0CTRL, (1<<RXM1) | (1<<RXM0));
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}
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void can_setled(unsigned char led, unsigned char state) {
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mcp_bitmod(BFPCTRL, 0x10<<led, state?0xff:0);
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}
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/*******************************************************************/
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void delayloop(){
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unsigned char x;
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for(x=0;x<255;x++){
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asm ("nop");
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}
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}
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void can_init(){
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//set Slave select high
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SPI_PORT |= (1<<SPI_PIN_SS);
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#ifdef CAN_INTERRUPT
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unsigned char x;
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for(x=0;x<CAN_RX_BUFFER_SIZE;x++){
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RX_BUFFER[x].flags = 0;
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}
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for(x=0;x<CAN_TX_BUFFER_SIZE;x++){
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TX_BUFFER[x].flags = 0;
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}
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#endif
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#ifdef CAN_HANDLEERROR
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can_error = 0;
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#endif
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mcp_reset();
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delayloop();
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mcp_write(BFPCTRL,0x0C);//RXBF Pins to Output
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// 0x01 : 125kbit/8MHz
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// 0x03 : 125kbit/16MHz
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// 0x04 : 125kbit/20MHz
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#if FREQ == 16000000
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#define CNF1_T 0x03
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#elif FREQ == 8000000
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#define CNF1_T 0x01
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#elif FREQ == 20000000
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#define CNF1_T 0x04
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#else
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#error Can Baudrate is only defined for 8, 16 and 20 MHz
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#endif
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mcp_write( CNF1, 0x40 | CNF1_T );
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mcp_write( CNF2, 0xf1 );
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mcp_write( CNF3, 0x05 );
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// configure IRQ: this only configures the INT Output of the mcp2515, not
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// the int on the Atmel
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mcp_write( CANINTE, (1<<RX0IE) | (1<<TX0IE) );
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can_setfilter();
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can_setmode(normal);
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#ifdef CAN_INTERRUPT
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// configure IRQ: this only configures the INT Output of the mcp2515,
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// not the int on the Atmel
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mcp_write( CANINTE, (1<<RX0IE) | (1<<TX0IE) );
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#ifdef __C64__
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#error not implemented yet
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#elif ATMEGA
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//this turns on INT0 on the Atmega
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GICR |= (1<<INT0);
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#else
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//this turns on INT0 on the Atmel
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MCUCR |= (1<<ISC01);
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GIMSK |= (1<<INT0);
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#endif //ATMEGA
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#else //CAN_INTERRUPT
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// configure IRQ: this only configures the INT Output of the mcp2515,
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// not the int on the Atmel
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mcp_write( CANINTE, (1<<RX0IE) ); //only turn RX int on
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#endif //CAN_INTERRUPT
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}
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#ifdef CAN_INTERRUPT
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//returns next can message in buffer, or 0 Pointer if buffer is empty
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can_message * can_get_nb() {
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can_message_x *p;
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if(RX_HEAD == RX_TAIL) {
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return 0;
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} else {
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p = &RX_BUFFER[RX_TAIL];
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if(++RX_TAIL == CAN_RX_BUFFER_SIZE) RX_TAIL = 0;
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return &(p->msg);
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}
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}
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can_message * can_get() {
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can_message_x *p;
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while(RX_HEAD == RX_TAIL) {};
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p = &RX_BUFFER[RX_TAIL];
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if(++RX_TAIL == CAN_RX_BUFFER_SIZE) RX_TAIL = 0;
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return &(p->msg);
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}
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//marks a receive buffer as unused again so it can be overwritten in Interrupt
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void can_free(can_message * msg) {
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can_message_x * msg_x = (can_message_x *) msg;
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msg_x->flags = 0;
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}
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//returns pointer to the next can TX buffer
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can_message * can_buffer_get() {
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can_message_x *p;
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p = &TX_BUFFER[TX_HEAD];
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while (p->flags&0x01); //wait until buffer is free
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if(++TX_HEAD == CAN_TX_BUFFER_SIZE) TX_HEAD = 0;
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return &(p->msg);
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}
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//start transmitting can messages, and mark message msg as transmittable
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void can_transmit(can_message* msg2) {
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can_message_x* msg=(can_message_x*) msg2;
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if(msg) {
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msg->flags |= 0x01;
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}
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if(!TX_INT) {
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if(((can_message_x*)&TX_BUFFER[TX_TAIL])->flags & 0x01) {
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((can_message_x*)&TX_BUFFER[TX_TAIL])->flags &= ~0x01;
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TX_INT = 1;
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message_load(&TX_BUFFER[TX_TAIL]);
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if(++TX_TAIL == CAN_TX_BUFFER_SIZE) TX_TAIL = 0;
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}
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}
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}
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#else // NON INTERRUPT VERSION
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can_message_x RX_MESSAGE, TX_MESSAGE;
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can_message * can_get_nb() {
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//check the pin, that the MCP's interrupt output connects to
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if(SPI_REG_PIN_MCP_INT & (1<<SPI_PIN_MCP_INT)) {
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return 0;
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} else {
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//So the MCP Generates an RX Interrupt
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message_fetch(&RX_MESSAGE);
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return &(RX_MESSAGE.msg);
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}
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}
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can_message * can_get() {
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//wait while the MCP doesn't generate an RX Interrupt
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while(SPI_REG_PIN_MCP_INT & (1<<SPI_PIN_MCP_INT)) {};
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message_fetch(&RX_MESSAGE);
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return &(RX_MESSAGE.msg);
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}
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//only for compatibility with Interrupt driven Version
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can_message * can_buffer_get() {
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return &(TX_MESSAGE.msg);
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}
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void can_transmit(can_message * msg) {
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message_load((can_message_x*)msg);
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}
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void can_free(can_message * msg) {
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}
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#endif /* CAN_INTERRUPT */
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#else /* ifdef __AVR__ */
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/* stubs for simulator */
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static can_message null_msg = {0};
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unsigned char mcp_status() {return 0;}
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void mcp_bitmod(unsigned char reg, unsigned char mask, unsigned char val){}
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void message_load(can_message_x * msg){}
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void message_fetch(can_message_x * msg){}
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void mcp_reset(){}
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void mcp_write(unsigned char reg, unsigned char data){}
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unsigned char mcp_read(unsigned char reg){return 0;}
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void can_setmode(can_mode_t mode) {}
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void can_setfilter() {}
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void can_setled(unsigned char led, unsigned char state){}
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void delayloop(){}
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void can_init(){}
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can_message * can_get_nb(){return &null_msg;}
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can_message * can_get(){return &null_msg;}
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can_message * can_buffer_get(){return &null_msg;}
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void can_transmit(can_message * msg){}
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void can_free(can_message * msg){}
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#endif
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