166 lines
2.8 KiB
C
166 lines
2.8 KiB
C
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#include "../config.h"
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#include <avr/signal.h>
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#include <avr/interrupt.h>
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#include <avr/io.h>
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#include "borg_hw.h"
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/*
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// Diese #defines werden nun durch menuconfig gesetzt
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//An diesen Pins ist das Schieberegister
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//für die Spalten angeschlossen.
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#define COLPORT PORTC
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#define COLDDR DDRC
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#define BIT_DAT 4 //Daten-Eingang
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#define BIT_CLK 5 //Takt-Eingang
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//An diesem Port sind die Zeilentreiber angeschlossen.
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//Ein Null-Pegel schaltet den jeweiligen Transistor an.
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#define ROWPORT1 PORTD
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#define ROWDDR1 DDRD
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#define ROWPORT2 PORTC
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#define ROWDDR2 DDRC
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*/
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#define COLDDR DDR(COLPORT)
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#define ROWDDR1 DDR(ROWPORT1)
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#define ROWDDR2 DDR(ROWPORT2)
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unsigned char pixmap[NUMPLANE][NUM_ROWS][LINEBYTES];
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inline void rowshow(unsigned char row, unsigned char plane){
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static uint8_t rowmask = 0xFF;
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uint8_t x, tmp;
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//alle Zeilentreiber aus
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ROWPORT1 |= 0xF3;
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ROWPORT2 |= 0x0C;
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for(x=0;x<10;x++){
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asm volatile ("nop");
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}
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if (row == 0){
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rowmask = 0x7F; //0111 1111
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}else{
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rowmask >>= 1;
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rowmask |= 0x80;
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}
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switch (plane){
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case 0:
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TCNT0 = 0x100-12;
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break;
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case 1:
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TCNT0 = 0x100-20;
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break;
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case 2:
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TCNT0 = 0x100-50;
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}
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//Die fünf bits für das 2. Display in das
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//Schieberegister takten
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tmp = pixmap[plane][row][0];
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for(x=0;x<3;x++){
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if(tmp & 0x20){
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COLPORT &= ~(1<<BIT_DAT);
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}else{
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COLPORT |= (1<<BIT_DAT);
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}
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tmp>>=1;
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COLPORT |= (1<<BIT_CLK);
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COLPORT &= ~(1<<BIT_CLK);
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}
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tmp = pixmap[plane][row][1];
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for(x=0;x<2;x++){
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if(tmp & 0x01){
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COLPORT &= ~(1<<BIT_DAT);
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}else{
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COLPORT |= (1<<BIT_DAT);
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}
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tmp>>=1;
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COLPORT |= (1<<BIT_CLK);
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COLPORT &= ~(1<<BIT_CLK);
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}
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//Die restlichen 5 bit auch ins Schieberegister
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tmp = pixmap[plane][row][0];
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for(x=0;x<5;x++){
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if(tmp & 0x01){
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COLPORT &= ~(1<<BIT_DAT);
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}else{
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COLPORT |= (1<<BIT_DAT);
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}
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tmp>>=1;
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COLPORT |= (1<<BIT_CLK);
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COLPORT &= ~(1<<BIT_CLK);
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}
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//nächste Zeile anschalten
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ROWPORT1 &= rowmask | 0x0C;
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ROWPORT2 &= rowmask | 0xF3;
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}
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extern uint8_t schmuh;
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ISR(TIMER0_OVF_vect)
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{
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static unsigned char plane = 0;
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static unsigned char row = 0;
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rowshow(row, plane);
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if(++row == NUM_ROWS){
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row = 0;
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if(++plane==NUMPLANE) plane=0;
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}
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schmuh = 1;
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}
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void timer0_on(){
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/* TCCR0: FOC0 WGM00 COM01 COM00 WGM01 CS02 CS01 CS00
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CS02 CS01 CS00
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0 0 0 stop
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0 0 1 clk
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0 1 0 clk/8
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0 1 1 clk/64
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1 0 0 clk/256
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1 0 1 clk/1024
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*/
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TCCR0 = 0x03; // clk/64
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TCNT0 = 0xFF-20;// reset timer
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TIMSK |= (1<<TOIE0);
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}
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void borg_hw_init(){
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// Alle Zeilentransistoren aus.
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ROWPORT1 |= 0xF3;
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// Port für Zeilentransistoren auf Ausgang
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ROWDDR1 |= 0xF3;
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ROWPORT2 |=0x0C;
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ROWDDR2 |=0x0C;
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//Signale für Schieberegister auf Ausgang
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COLDDR |= (1<<BIT_CLK) | (1<<BIT_DAT);
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COLPORT &= ~(1<<BIT_CLK);
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timer0_on();
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}
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