120 lines
2.1 KiB
C
120 lines
2.1 KiB
C
#include <avr/interrupt.h>
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#include <avr/io.h>
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#undef WATCHDOG_ENABLED
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#ifdef WATCHDOG_ENABLED
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# include <avr/wdt.h>
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#endif
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#include "../config.h"
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#include "../makros.h"
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#include "borg_hw.h"
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// define row port
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#ifndef ROWPORT
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# define ROWPORT PORTA
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#endif
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#define ROWDDR DDR(ROWPORT)
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// define column port
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#ifndef COLPORT
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# define COLPORT PORTC
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#endif
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#define COLDDR DDR(COLPORT)
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// buffer which holds the currently shown frame
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unsigned char pixmap[NUMPLANE][NUM_ROWS][LINEBYTES];
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SIGNAL(SIG_OUTPUT_COMPARE0)
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{
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static unsigned char plane = 0;
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static unsigned char row = 0;
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#ifdef WATCHDOG_ENABLED
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// reset watchdog
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wdt_reset();
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#endif
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ROWPORT = 0;
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row++;
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if ((COLPORT <<= 1) == 0) {
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row = 0;
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COLPORT = 1;
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if (++plane == NUMPLANE)
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{
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plane = 0;
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}
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}
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for (unsigned char x = 0; x < 10; x++) {
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asm volatile ("nop");
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}
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ROWPORT = pixmap[plane][row][0];
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}
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void timer0_off(){
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cli();
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COLPORT = 0;
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ROWPORT = 0;
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#if defined (__AVR_ATmega644P__) || defined (__AVR_ATmega644__)
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TCCR0A = 0x00;
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TCCR0B = 0x00;
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TIMSK0 = 0;
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#else
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TCCR0 = 0x00;
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TIMSK = 0;
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#endif
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sei();
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}
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static void timer0_on(){
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/* TCCR0: FOC0 WGM00 COM01 COM00 WGM01 CS02 CS01 CS00
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CS02 CS01 CS00
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0 0 0 stop
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0 0 1 clk
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0 1 0 clk/8
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0 1 1 clk/64
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1 0 0 clk/256
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1 0 1 clk/1024
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*/
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#if defined (__AVR_ATmega644P__) || defined (__AVR_ATmega644__)
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TCCR0A = 0x02; // CTC Mode
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TCCR0B = 0x03; // clk/64
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TCNT0 = 0x00; // reset timer
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OCR0 = 0x0A; // compare with this value
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TIMSK0 = 0x02; // compare match Interrupt on
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#else
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TCCR0 = 0x0B; // CTC Mode, clk/64
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TCNT0 = 0x00; // reset timer
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OCR0 = 0x0A; // compare with this value
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TIMSK = 0x02; // compare match Interrupt on
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#endif
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}
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void borg_hw_init(){
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// switch all pins of both the row and the column port to output mode
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ROWDDR = 0xFF;
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COLDDR = 0xFF;
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// switch off all rows and columns for now
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COLPORT = 0;
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ROWPORT = 0;
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timer0_on();
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#ifdef WATCHDOG_ENABLED
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// activate watchdog timer
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wdt_reset();
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wdt_enable(0x00); // 17ms watchdog
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#endif
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}
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