2009-06-19 21:09:08 +00:00
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#include"../autoconf.h"
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#include <avr/interrupt.h>
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#include <avr/io.h>
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#include <avr/wdt.h>
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#include "borg_hw.h"
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2011-08-17 01:16:25 +00:00
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/* pinout of the ribbon cable connected to the panel
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* (the numbering is actually upside down)
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2009-06-19 21:09:08 +00:00
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*
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* 1-3 GND
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2011-08-17 01:16:25 +00:00
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* 4 +5V for logic
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2009-06-19 21:09:08 +00:00
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* 5-8 +12V
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* 9-10 GND
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* 11 CP3
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* 12 CP2
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* 13 CP1
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* 14 /show
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* 15 CP4
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* 16 /EO3
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* 17-18 GND
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* 19-26 D0-D7
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*
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* and now the right way round:
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2009-06-19 21:09:08 +00:00
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* 1 D7
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* 2 D6
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* 3 D5
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* 4 D4
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* 5 D3
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* 6 D2
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* 7 D1
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* 8 D0
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* 9 GND
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* 10 GND
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* 11 /EO3
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* 12 CP4
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* 13 /show
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* 14 CP1
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* 15 CP2
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* 16 CP3
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* 17 GND
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* 18 GND
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* 19 +12V
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* 20 +12V
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* 21 +12V
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* 22 +12V
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* 23 +5V
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* 24 GND
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* 25 GND
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* 26 GND
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*
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* Four 40374 latches are used. No. 1, 2 and 4 drive from the data bus to the
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* panel, no. 3 drives from the button outputs to the data bus. The EOs of
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* 1, 2 and 4 are hardwired to GND.
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*
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* The LEDs are aligned to a 12*16 matrix. The values for the LED columns are
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* passed to the latches via CP1 und CP2 (16 columns total). The index of the
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* row is passed during the deletion of "/show".
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2009-06-19 21:09:08 +00:00
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*
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2011-08-17 01:16:25 +00:00
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* The buttons are aligned to an 8*8 matrix. The rows get separately set to
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* "high" via latch 4. The columns can then be read via latch 3.
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2009-06-19 21:09:08 +00:00
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*/
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2011-08-17 01:16:25 +00:00
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// data port for the panel
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#define COLPORT PORTC
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#define COLDDR DDRC
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#define COLPIN PINC
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#define CTRLPORT PORTD
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#define CTRLDDR DDRD
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// pins on CTRLPORT
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#define PIN_EO3 PD7
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#define PIN_CP4 PD2
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#define PIN_SHOW PD3
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#define PIN_CP1 PD4
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#define PIN_CP2 PD5
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#define PIN_CP3 PD6
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2011-08-17 01:16:25 +00:00
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// buffer which holds the currently shown frame
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unsigned char pixmap[NUMPLANE][NUM_ROWS][LINEBYTES];
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volatile uint8_t keys[8];
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2011-08-17 01:16:25 +00:00
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2009-06-19 21:09:08 +00:00
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inline void busywait() {
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//unsigned char i;
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//for(i=0; i < 20; i++){
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2009-06-19 21:09:08 +00:00
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// asm volatile("nop");
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//}
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}
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2011-08-17 01:16:25 +00:00
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// display a row
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inline void rowshow(unsigned char row, unsigned char plane){
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2011-08-17 01:16:25 +00:00
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CTRLPORT |= (1 << PIN_SHOW); //blank
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COLPORT = pixmap[plane][row][0];
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2009-06-19 21:09:08 +00:00
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busywait();
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CTRLPORT |= (1 << PIN_CP1);
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busywait();
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CTRLPORT &= ~(1 << PIN_CP1);
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2009-06-19 21:09:08 +00:00
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busywait();
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2011-08-17 01:16:25 +00:00
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COLPORT = pixmap[plane][row][1];
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busywait();
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CTRLPORT |= (1 << PIN_CP2);
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busywait();
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CTRLPORT &= ~(1 << PIN_CP2);
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busywait();
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COLPORT = row;
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2009-06-19 21:09:08 +00:00
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busywait();
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2011-08-17 01:16:25 +00:00
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CTRLPORT &= ~(1 << PIN_SHOW);
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2009-06-19 21:09:08 +00:00
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}
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2009-06-19 21:09:08 +00:00
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inline void checkkeys(uint8_t row){
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static uint8_t mask;
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if (row == 0) {
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mask = 1;
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} else {
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2009-06-19 21:09:08 +00:00
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//read keyboard cols into latch
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COLDDR = 0;
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2011-08-17 01:16:25 +00:00
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CTRLPORT &= ~(1 << PIN_EO3);
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CTRLPORT |= (1 << PIN_CP3);
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busywait();
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CTRLPORT &= ~(1 << PIN_CP3);
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busywait();
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keys[row - 1] = COLPIN;
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CTRLPORT |= (1 << PIN_EO3);
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busywait();
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COLDDR = 0xFF;
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}
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COLPORT = mask;
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2009-06-19 21:09:08 +00:00
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mask <<= 1;
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busywait();
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CTRLPORT |= (1 << PIN_CP4);
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2009-06-19 21:09:08 +00:00
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busywait();
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CTRLPORT &= ~(1 << PIN_CP4);
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2009-06-19 21:09:08 +00:00
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}
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2011-08-17 01:16:25 +00:00
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// depending on the plane this interrupt gets triggered at 50 kHz, 31.25 kHz or
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// 12.5 kHz
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SIGNAL(SIG_OUTPUT_COMPARE0)
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{
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static unsigned char plane = 0;
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static unsigned char row = 0;
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2011-08-17 01:16:25 +00:00
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// reset watchdog
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wdt_reset();
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2011-08-17 01:16:25 +00:00
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// output current row according to current plane
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rowshow(row, plane);
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if( (plane == 2) && (row<9) ) checkkeys(row);
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2011-08-17 01:16:25 +00:00
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// increment both row and plane
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if(++row == NUM_ROWS){
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row = 0;
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if(++plane==NUMPLANE) plane=0;
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switch(plane){
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case 0:
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OCR0 = 5;
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break;
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case 1:
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OCR0 = 12;
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break;
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case 2:
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OCR0 = 20;
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break;
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}
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}
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}
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void timer0_off(){
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cli();
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TCCR0 = 0x00;
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sei();
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}
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2011-08-17 01:16:25 +00:00
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// initialize timer which triggers the interrupt
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void timer0_on(){
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/* TCCR0: FOC0 WGM00 COM01 COM00 WGM01 CS02 CS01 CS00
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CS02 CS01 CS00
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0 0 0 stop
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0 0 1 clk
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0 1 0 clk/8
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0 1 1 clk/64
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1 0 0 clk/256
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1 0 1 clk/1024
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*/
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TCCR0 = 0x0C; // CTC Mode, clk/64
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TCNT0 = 0; // reset timer
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OCR0 = 20; // compare with this value
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TIMSK = 0x02; // compare match Interrupt on
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}
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2011-08-17 01:16:25 +00:00
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2009-06-19 21:09:08 +00:00
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void borg_hw_init(){
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//Pins am Zeilenport auf Ausgang
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2011-08-17 01:16:25 +00:00
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CTRLPORT |= (1 << PIN_EO3) | (1 << PIN_SHOW);
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CTRLDDR |= (1 << PIN_EO3) | (1 << PIN_CP4) | (1 << PIN_SHOW)
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| (1 << PIN_CP1) | (1 << PIN_CP2) | (1 << PIN_CP3);
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// switch off all columns for now
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// switch column ports to output mode
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COLDDR = 0xFF;
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COLPORT = 0x00;
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2011-08-17 01:16:25 +00:00
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2009-06-19 21:09:08 +00:00
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timer0_on();
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2011-08-17 01:16:25 +00:00
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// activate watchdog timer
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wdt_reset();
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wdt_enable(0x00); // 17ms watchdog
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}
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