463 lines
11 KiB
C++
463 lines
11 KiB
C++
/*
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Copyright (C) 2011 James Coliz, Jr. <maniacbug@ymail.com>
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License
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version 2 as published by the Free Software Foundation.
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*/
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#include <WProgram.h>
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#include <SPI.h>
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#include "RF24.h"
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#include "nRF24L01.h"
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#undef SERIAL_DEBUG
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#ifdef SERIAL_DEBUG
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#define IF_SERIAL_DEBUG(x) (x)
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#else
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#define IF_SERIAL_DEBUG(x)
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#endif
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/******************************************************************/
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void RF24::csn(int mode)
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{
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SPI.setDataMode(SPI_MODE0);
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digitalWrite(csn_pin,mode);
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}
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/******************************************************************/
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void RF24::ce(int mode)
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{
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digitalWrite(ce_pin,mode);
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}
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/******************************************************************/
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uint8_t RF24::read_register(uint8_t reg, uint8_t* buf, uint8_t len)
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{
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uint8_t status;
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csn(LOW);
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status = SPI.transfer( R_REGISTER | ( REGISTER_MASK & reg ) );
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while ( len-- )
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*buf++ = SPI.transfer(0xff);
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csn(HIGH);
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return status;
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}
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/******************************************************************/
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uint8_t RF24::write_register(uint8_t reg, const uint8_t* buf, uint8_t len)
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{
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uint8_t status;
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csn(LOW);
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status = SPI.transfer( W_REGISTER | ( REGISTER_MASK & reg ) );
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while ( len-- )
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SPI.transfer(*buf++);
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csn(HIGH);
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return status;
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}
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/******************************************************************/
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uint8_t RF24::write_register(uint8_t reg, uint8_t value)
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{
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uint8_t status;
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IF_SERIAL_DEBUG(printf_P(PSTR("write_register(%02x,%02x)\n\r"),reg,value));
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csn(LOW);
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status = SPI.transfer( W_REGISTER | ( REGISTER_MASK & reg ) );
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SPI.transfer(value);
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csn(HIGH);
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return status;
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}
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/******************************************************************/
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uint8_t RF24::write_payload(const void* buf, uint8_t len)
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{
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uint8_t status;
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const uint8_t* current = (const uint8_t*)buf;
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csn(LOW);
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status = SPI.transfer( W_TX_PAYLOAD );
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uint8_t data_len = min(len,payload_size);
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uint8_t blank_len = payload_size - data_len;
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while ( data_len-- )
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SPI.transfer(*current++);
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while ( blank_len-- )
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SPI.transfer(0);
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csn(HIGH);
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return status;
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}
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/******************************************************************/
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uint8_t RF24::read_payload(void* buf, uint8_t len)
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{
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uint8_t status;
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uint8_t* current = (uint8_t*)buf;
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csn(LOW);
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status = SPI.transfer( R_RX_PAYLOAD );
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uint8_t data_len = min(len,payload_size);
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uint8_t blank_len = payload_size - data_len;
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while ( data_len-- )
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*current++ = SPI.transfer(0xff);
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while ( blank_len-- )
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SPI.transfer(0xff);
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csn(HIGH);
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return status;
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}
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/******************************************************************/
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uint8_t RF24::flush_rx(void)
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{
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uint8_t status;
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csn(LOW);
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status = SPI.transfer( FLUSH_RX );
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csn(HIGH);
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return status;
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}
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/******************************************************************/
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uint8_t RF24::flush_tx(void)
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{
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uint8_t status;
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csn(LOW);
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status = SPI.transfer( FLUSH_TX );
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csn(HIGH);
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return status;
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}
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/******************************************************************/
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uint8_t RF24::get_status(void)
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{
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uint8_t status;
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csn(LOW);
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status = SPI.transfer( NOP );
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csn(HIGH);
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return status;
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}
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/******************************************************************/
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void RF24::print_status(uint8_t status)
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{
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printf_P(PSTR("STATUS=%02x: RX_DR=%x TX_DS=%x MAX_RT=%x RX_P_NO=%x TX_FULL=%x\n\r"),
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status,
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(status & _BV(RX_DR))?1:0,
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(status & _BV(TX_DS))?1:0,
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(status & _BV(MAX_RT))?1:0,
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((status >> RX_P_NO) & B111),
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(status & _BV(TX_FULL))?1:0
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);
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}
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/******************************************************************/
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void RF24::print_observe_tx(uint8_t value)
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{
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printf_P(PSTR("OBSERVE_TX=%02x: POLS_CNT=%x ARC_CNT=%x\n\r"),
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value,
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(value >> PLOS_CNT) & B1111,
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(value >> ARC_CNT) & B1111
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);
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}
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/******************************************************************/
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RF24::RF24(uint8_t _cepin, uint8_t _cspin):
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ce_pin(_cepin), csn_pin(_cspin), payload_size(32)
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{
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}
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/******************************************************************/
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void RF24::setChannel(uint8_t channel)
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{
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write_register(RF_CH,min(channel,127));
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}
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/******************************************************************/
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void RF24::setPayloadSize(uint8_t size)
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{
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payload_size = min(size,32);
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}
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/******************************************************************/
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uint8_t RF24::getPayloadSize(void)
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{
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return payload_size;
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}
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/******************************************************************/
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void RF24::printDetails(void)
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{
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uint8_t buffer[5];
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uint8_t status = read_register(RX_ADDR_P0,buffer,5);
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print_status(status);
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printf_P(PSTR("RX_ADDR_P0 = 0x"));
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uint8_t *bufptr = buffer + 5;
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while( bufptr-- > buffer )
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printf_P(PSTR("%02x"),*bufptr);
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printf_P(PSTR("\n\r"));
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status = read_register(RX_ADDR_P1,buffer,5);
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printf_P(PSTR("RX_ADDR_P1 = 0x"));
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bufptr = buffer + 5;
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while( bufptr-- > buffer )
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printf_P(PSTR("%02x"),*bufptr);
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printf_P(PSTR("\n\r"));
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status = read_register(RX_ADDR_P2,buffer,1);
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printf_P(PSTR("RX_ADDR_P2 = 0x%02x"),*buffer);
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printf_P(PSTR("\n\r"));
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status = read_register(RX_ADDR_P3,buffer,1);
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printf_P(PSTR("RX_ADDR_P3 = 0x%02x"),*buffer);
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printf_P(PSTR("\n\r"));
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status = read_register(TX_ADDR,buffer,5);
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printf_P(PSTR("TX_ADDR = 0x"));
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bufptr = buffer + 5;
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while( bufptr-- > buffer )
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printf_P(PSTR("%02x"),*bufptr);
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printf_P(PSTR("\n\r"));
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status = read_register(RX_PW_P0,buffer,1);
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printf_P(PSTR("RX_PW_P0 = 0x%02x\n\r"),*buffer);
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status = read_register(RX_PW_P1,buffer,1);
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printf_P(PSTR("RX_PW_P1 = 0x%02x\n\r"),*buffer);
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read_register(EN_AA,buffer,1);
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printf_P(PSTR("EN_AA = %02x\n\r"),*buffer);
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read_register(EN_RXADDR,buffer,1);
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printf_P(PSTR("EN_RXADDR = %02x\n\r"),*buffer);
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read_register(RF_CH,buffer,1);
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printf_P(PSTR("RF_CH = %02x\n\r"),*buffer);
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}
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/******************************************************************/
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void RF24::begin(void)
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{
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pinMode(ce_pin,OUTPUT);
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pinMode(csn_pin,OUTPUT);
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ce(LOW);
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csn(HIGH);
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SPI.begin();
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SPI.setBitOrder(MSBFIRST);
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SPI.setDataMode(SPI_MODE0);
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SPI.setClockDivider(SPI_CLOCK_DIV8);
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// Set generous timeouts, to make testing a little easier
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write_register(SETUP_RETR,(B1111 << ARD) | (B1111 << ARC));
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// Reset current status
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write_register(STATUS,_BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT) );
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// Flush buffers
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flush_rx();
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flush_tx();
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// Set up default configuration. Callers can always change it later.
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setChannel(1);
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}
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/******************************************************************/
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void RF24::startListening(void)
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{
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write_register(CONFIG, _BV(EN_CRC) | _BV(PWR_UP) | _BV(PRIM_RX));
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write_register(STATUS, _BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT) );
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// Flush buffers
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flush_rx();
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// Go!
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ce(HIGH);
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// wait for the radio to come up (130us actually only needed)
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delay(1);
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}
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/******************************************************************/
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void RF24::stopListening(void)
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{
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ce(LOW);
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}
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/******************************************************************/
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boolean RF24::write( const void* buf, uint8_t len )
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{
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boolean result = false;
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// Transmitter power-up
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write_register(CONFIG, _BV(EN_CRC) | _BV(PWR_UP));
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// Send the payload
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write_payload( buf, len );
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// Allons!
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ce(HIGH);
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// IN the end, the send should be blocking. It comes back in 60ms worst case, or much faster
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// if I tighted up the retry logic. (Default settings will be 750us.
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// Monitor the send
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uint8_t observe_tx;
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uint8_t status;
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do
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{
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status = read_register(OBSERVE_TX,&observe_tx,1);
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IF_SERIAL_DEBUG(Serial.print(status,HEX));
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IF_SERIAL_DEBUG(Serial.print(observe_tx,HEX));
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}
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while( ! ( status & ( _BV(TX_DS) | _BV(MAX_RT) ) ) );
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if ( status & _BV(TX_DS) )
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result = true;
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IF_SERIAL_DEBUG(Serial.println(result?"...OK.":"...Failed"));
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// Yay, we are done.
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ce(LOW);
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// Power down
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write_register(CONFIG, _BV(EN_CRC) );
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// Reset current status
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write_register(STATUS,_BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT) );
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// Flush buffers
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flush_tx();
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return result;
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}
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/******************************************************************/
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boolean RF24::available(void)
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{
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return available(NULL);
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}
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/******************************************************************/
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boolean RF24::available(uint8_t* pipe_num)
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{
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uint8_t status = get_status();
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boolean result = ( status & _BV(RX_DR) );
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if (result)
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{
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IF_SERIAL_DEBUG(print_status(status));
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// If the caller wants the pipe number, include that
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if ( pipe_num )
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*pipe_num = ( status >> RX_P_NO ) & B111;
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// Clear the status bit
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// ??? Should this REALLY be cleared now? Or wait until we
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// actually READ the payload?
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write_register(STATUS,_BV(RX_DR) );
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}
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return result;
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}
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/******************************************************************/
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boolean RF24::read( void* buf, uint8_t len )
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{
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// was this the last of the data available?
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boolean result = false;
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// Fetch the payload
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read_payload( buf, len );
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uint8_t fifo_status;
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read_register(FIFO_STATUS,&fifo_status,1);
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if ( fifo_status & _BV(RX_EMPTY) )
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result = true;
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return result;
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}
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/******************************************************************/
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void RF24::openWritingPipe(uint64_t value)
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{
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// Note that AVR 8-bit uC's store this LSB first, and the NRF24L01
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// expects it LSB first too, so we're good.
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write_register(RX_ADDR_P0, reinterpret_cast<uint8_t*>(&value), 5);
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write_register(TX_ADDR, reinterpret_cast<uint8_t*>(&value), 5);
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write_register(RX_PW_P0,min(payload_size,32));
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}
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/******************************************************************/
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void RF24::openReadingPipe(uint8_t child, uint64_t value)
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{
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const uint8_t child_pipe[] = {
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RX_ADDR_P1, RX_ADDR_P2, RX_ADDR_P3, RX_ADDR_P4, RX_ADDR_P5 };
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const uint8_t child_payload_size[] = {
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RX_PW_P1, RX_PW_P2, RX_PW_P3, RX_PW_P4, RX_PW_P5 };
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const uint8_t child_pipe_enable[] = {
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ERX_P1, ERX_P2, ERX_P3, ERX_P4, ERX_P5 };
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if (--child < 5)
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{
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// For pipes 2-5, only write the LSB
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if ( !child )
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write_register(child_pipe[child], reinterpret_cast<uint8_t*>(&value), 5);
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else
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write_register(child_pipe[child], reinterpret_cast<uint8_t*>(&value), 1);
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write_register(child_payload_size[child],payload_size);
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// Note this is kind of an inefficient way to set up these enable bits, bit I thought it made
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// the calling code more simple
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uint8_t en_rx;
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read_register(EN_RXADDR,&en_rx,1);
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en_rx |= _BV(child_pipe_enable[child]);
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write_register(EN_RXADDR,en_rx);
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}
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}
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// vim:ai:cin:sts=2 sw=2 ft=cpp
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