interfisch
/
rf24-pio
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity
rf24-pio/RF24.cpp

705 lines
17 KiB
C++
Raw Blame History

/*
Copyright (C) 2011 James Coliz, Jr. <maniacbug@ymail.com>
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License
version 2 as published by the Free Software Foundation.
*/
#include <WProgram.h>
#include <SPI.h>
#include "RF24.h"
#include "nRF24L01.h"
#undef SERIAL_DEBUG
#ifdef SERIAL_DEBUG
#define IF_SERIAL_DEBUG(x) ({x;})
#else
#define IF_SERIAL_DEBUG(x)
#endif
// Avoid spurious warnings
#undef PROGMEM
#define PROGMEM __attribute__(( section(".progmem.data") ))
#undef PSTR
#define PSTR(s) (__extension__({static prog_char __c[] PROGMEM = (s); &__c[0];}))
/******************************************************************/
void RF24::csn(int mode)
{
SPI.setDataMode(SPI_MODE0);
SPI.setClockDivider(SPI_CLOCK_DIV8);
digitalWrite(csn_pin,mode);
}
/******************************************************************/
void RF24::ce(int mode)
{
digitalWrite(ce_pin,mode);
}
/******************************************************************/
uint8_t RF24::read_register(uint8_t reg, uint8_t* buf, uint8_t len)
{
uint8_t status;
csn(LOW);
status = SPI.transfer( R_REGISTER | ( REGISTER_MASK & reg ) );
while ( len-- )
*buf++ = SPI.transfer(0xff);
csn(HIGH);
return status;
}
/******************************************************************/
uint8_t RF24::read_register(uint8_t reg)
{
csn(LOW);
SPI.transfer( R_REGISTER | ( REGISTER_MASK & reg ) );
uint8_t result = SPI.transfer(0xff);
csn(HIGH);
return result;
}
/******************************************************************/
uint8_t RF24::write_register(uint8_t reg, const uint8_t* buf, uint8_t len)
{
uint8_t status;
csn(LOW);
status = SPI.transfer( W_REGISTER | ( REGISTER_MASK & reg ) );
while ( len-- )
SPI.transfer(*buf++);
csn(HIGH);
return status;
}
/******************************************************************/
uint8_t RF24::write_register(uint8_t reg, uint8_t value)
{
uint8_t status;
IF_SERIAL_DEBUG(printf_P(PSTR("write_register(%02x,%02x)\n\r"),reg,value));
csn(LOW);
status = SPI.transfer( W_REGISTER | ( REGISTER_MASK & reg ) );
SPI.transfer(value);
csn(HIGH);
return status;
}
/******************************************************************/
uint8_t RF24::write_payload(const void* buf, uint8_t len)
{
uint8_t status;
const uint8_t* current = reinterpret_cast<const uint8_t*>(buf);
csn(LOW);
status = SPI.transfer( W_TX_PAYLOAD );
uint8_t data_len = min(len,payload_size);
while ( data_len-- )
SPI.transfer(*current++);
// This does not seem to be needed. Keeping it here in case
// removing it does cause problems for static payloads
//
// Send blanks out to the chip to finish off the payload
//uint8_t blank_len = payload_size - data_len;
//while ( blank_len-- )
// SPI.transfer(0);
csn(HIGH);
return status;
}
/******************************************************************/
uint8_t RF24::read_payload(void* buf, uint8_t len)
{
uint8_t status;
uint8_t* current = reinterpret_cast<uint8_t*>(buf);
csn(LOW);
status = SPI.transfer( R_RX_PAYLOAD );
uint8_t data_len = min(len,payload_size);
while ( data_len-- )
*current++ = SPI.transfer(0xff);
// This does not seem to be needed. Keeping it here in case
// removing it does cause problems for static payloads
//
// Read the remaining payload off the chip, even though we will
// throw it away.
//uint8_t blank_len = payload_size - data_len;
//while ( blank_len-- )
// SPI.transfer(0xff);
csn(HIGH);
return status;
}
/******************************************************************/
uint8_t RF24::flush_rx(void)
{
uint8_t status;
csn(LOW);
status = SPI.transfer( FLUSH_RX );
csn(HIGH);
return status;
}
/******************************************************************/
uint8_t RF24::flush_tx(void)
{
uint8_t status;
csn(LOW);
status = SPI.transfer( FLUSH_TX );
csn(HIGH);
return status;
}
/******************************************************************/
uint8_t RF24::get_status(void)
{
uint8_t status;
csn(LOW);
status = SPI.transfer( NOP );
csn(HIGH);
return status;
}
/******************************************************************/
void RF24::print_status(uint8_t status)
{
printf_P(PSTR("STATUS\t\t = 0x%02x RX_DR=%x TX_DS=%x MAX_RT=%x RX_P_NO=%x TX_FULL=%x\n\r"),
status,
(status & _BV(RX_DR))?1:0,
(status & _BV(TX_DS))?1:0,
(status & _BV(MAX_RT))?1:0,
((status >> RX_P_NO) & B111),
(status & _BV(TX_FULL))?1:0
);
}
/******************************************************************/
void RF24::print_observe_tx(uint8_t value)
{
printf_P(PSTR("OBSERVE_TX=%02x: POLS_CNT=%x ARC_CNT=%x\n\r"),
value,
(value >> PLOS_CNT) & B1111,
(value >> ARC_CNT) & B1111
);
}
/******************************************************************/
void RF24::print_byte_register(prog_char* name, uint8_t reg, uint8_t qty)
{
char extra_tab = strlen_P(name) < 8 ? '\t' : 0;
printf_P(PSTR("%S\t%c ="),name,extra_tab);
while (qty--)
printf_P(PSTR(" 0x%02x"),read_register(reg++));
printf_P(PSTR("\n\r"));
}
/******************************************************************/
void RF24::print_address_register(prog_char* name, uint8_t reg, uint8_t qty)
{
char extra_tab = strlen_P(name) < 8 ? '\t' : 0;
printf_P(PSTR("%S\t%c ="),name,extra_tab);
while (qty--)
{
uint8_t buffer[5];
read_register(reg++,buffer,sizeof buffer);
printf_P(PSTR(" 0x"));
uint8_t* bufptr = buffer + sizeof buffer;
while( --bufptr >= buffer )
printf_P(PSTR("%02x"),*bufptr);
}
printf_P(PSTR("\n\r"));
}
/******************************************************************/
RF24::RF24(uint8_t _cepin, uint8_t _cspin):
ce_pin(_cepin), csn_pin(_cspin), payload_size(32), ack_payload_available(false)
{
}
/******************************************************************/
void RF24::setChannel(uint8_t channel)
{
write_register(RF_CH,min(channel,127));
}
/******************************************************************/
void RF24::setPayloadSize(uint8_t size)
{
payload_size = min(size,32);
}
/******************************************************************/
uint8_t RF24::getPayloadSize(void)
{
return payload_size;
}
/******************************************************************/
void RF24::printDetails(void)
{
print_status(get_status());
print_address_register(PSTR("RX_ADDR_P0-1"),RX_ADDR_P0,2);
print_byte_register(PSTR("RX_ADDR_P2-5"),RX_ADDR_P2,4);
print_address_register(PSTR("TX_ADDR"),TX_ADDR);
print_byte_register(PSTR("RX_PW_P0-6"),RX_PW_P0,6);
print_byte_register(PSTR("EN_AA"),EN_AA);
print_byte_register(PSTR("EN_RXADDR"),EN_RXADDR);
print_byte_register(PSTR("RF_CH"),RF_CH);
print_byte_register(PSTR("RF_SETUP"),RF_SETUP);
print_byte_register(PSTR("DYNPD/FEATURE"),DYNPD,2);
}
/******************************************************************/
void RF24::begin(void)
{
pinMode(ce_pin,OUTPUT);
pinMode(csn_pin,OUTPUT);
ce(LOW);
csn(HIGH);
SPI.begin();
SPI.setBitOrder(MSBFIRST);
SPI.setDataMode(SPI_MODE0);
SPI.setClockDivider(SPI_CLOCK_DIV8);
// Set generous timeouts, to make testing a little easier
write_register(SETUP_RETR,(B1111 << ARD) | (B1111 << ARC));
// Reset current status
write_register(STATUS,_BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT) );
// Initialize CRC
write_register(CONFIG, _BV(EN_CRC) );
// Flush buffers
flush_rx();
flush_tx();
// Set up default configuration. Callers can always change it later.
setChannel(1);
}
/******************************************************************/
void RF24::startListening(void)
{
write_register(CONFIG, read_register(CONFIG) | _BV(PWR_UP) | _BV(PRIM_RX));
write_register(STATUS, _BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT) );
// Restore the pipe0 adddress
write_register(RX_ADDR_P0, reinterpret_cast<uint8_t*>(&pipe0_reading_address), 5);
// Flush buffers
flush_rx();
// Go!
ce(HIGH);
// wait for the radio to come up (130us actually only needed)
delayMicroseconds(130);
}
/******************************************************************/
void RF24::stopListening(void)
{
ce(LOW);
}
/******************************************************************/
void RF24::powerDown(void)
{
write_register(CONFIG,read_register(CONFIG) & ~_BV(PWR_UP));
}
/******************************************************************/
bool RF24::write( const void* buf, uint8_t len )
{
bool result = false;
// Begin the write
startWrite(buf,len);
// ------------
// At this point we could return from a non-blocking write, and then call
// the rest after an interrupt
// Instead, we are going to block here until we get TX_DS (transmission completed and ack'd)
// or MAX_RT (maximum retries, transmission failed). Also, we'll timeout in case the radio
// is flaky and we get neither.
uint8_t observe_tx;
uint8_t status;
uint32_t sent_at = millis();
const uint32_t timeout = 500; //ms to wait for timeout
do
{
status = read_register(OBSERVE_TX,&observe_tx,1);
IF_SERIAL_DEBUG(Serial.print(observe_tx,HEX));
}
while( ! ( status & ( _BV(TX_DS) | _BV(MAX_RT) ) ) && ( millis() - sent_at < timeout ) );
// The part above is what you could recreate with your own interrupt handler,
// and then call this when you got an interrupt
// ------------
// Call this when you get an interrupt
// The status tells us three things
// * The send was successful (TX_DS)
// * The send failed, too many retries (MAX_RT)
// * There is an ack packet waiting (RX_DR)
bool tx_ok, tx_fail, ack_payload_available;
whatHappened(tx_ok,tx_fail,ack_payload_available);
result = tx_ok;
IF_SERIAL_DEBUG(Serial.print(result?"...OK.":"...Failed"));
// Handle the ack packet
if ( ack_payload_available )
{
ack_payload_length = getDynamicPayloadSize();
IF_SERIAL_DEBUG(Serial.print("[AckPacket]/"));
IF_SERIAL_DEBUG(Serial.println(ack_payload_length,DEC));
}
// Yay, we are done.
// Power down
powerDown();
// Flush buffers (Is this a relic of past experimentation, and not needed anymore??)
flush_tx();
return result;
}
/******************************************************************/
void RF24::startWrite( const void* buf, uint8_t len )
{
// Transmitter power-up
write_register(CONFIG, ( read_register(CONFIG) | _BV(PWR_UP) ) & ~_BV(PRIM_RX) );
delay(2);
// Send the payload
write_payload( buf, len );
// Allons!
ce(HIGH);
delayMicroseconds(15);
ce(LOW);
}
/******************************************************************/
uint8_t RF24::getDynamicPayloadSize(void)
{
uint8_t result = 0;
csn(LOW);
SPI.transfer( R_RX_PL_WID );
result = SPI.transfer(0xff);
csn(HIGH);
return result;
}
/******************************************************************/
bool RF24::available(void)
{
return available(NULL);
}
/******************************************************************/
bool RF24::available(uint8_t* pipe_num)
{
uint8_t status = get_status();
// Too noisy, enable if you really want lots o data!! IF_SERIAL_DEBUG(print_status(status));
bool result = ( status & _BV(RX_DR) );
if (result)
{
// If the caller wants the pipe number, include that
if ( pipe_num )
*pipe_num = ( status >> RX_P_NO ) & B111;
// Clear the status bit
// ??? Should this REALLY be cleared now? Or wait until we
// actually READ the payload?
write_register(STATUS,_BV(RX_DR) );
// Handle ack payload receipt
if ( status & _BV(TX_DS) )
{
write_register(STATUS,_BV(TX_DS));
}
}
return result;
}
/******************************************************************/
bool RF24::read( void* buf, uint8_t len )
{
// Fetch the payload
read_payload( buf, len );
// was this the last of the data available?
return read_register(FIFO_STATUS) & _BV(RX_EMPTY);
}
/******************************************************************/
void RF24::whatHappened(bool& tx_ok,bool& tx_fail,bool& rx_ready)
{
// Read the status & reset the status in one easy call
uint8_t status = write_register(STATUS,_BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT) );
// Report to the user what happened
tx_ok = status & _BV(TX_DS);
tx_fail = status & _BV(MAX_RT);
rx_ready = status & _BV(RX_DR);
}
/******************************************************************/
void RF24::openWritingPipe(uint64_t value)
{
// Note that AVR 8-bit uC's store this LSB first, and the NRF24L01
// expects it LSB first too, so we're good.
write_register(RX_ADDR_P0, reinterpret_cast<uint8_t*>(&value), 5);
write_register(TX_ADDR, reinterpret_cast<uint8_t*>(&value), 5);
write_register(RX_PW_P0,min(payload_size,32));
}
/******************************************************************/
void RF24::openReadingPipe(uint8_t child, uint64_t value)
{
const uint8_t child_pipe[] =
{
RX_ADDR_P0, RX_ADDR_P1, RX_ADDR_P2, RX_ADDR_P3, RX_ADDR_P4, RX_ADDR_P5
};
const uint8_t child_payload_size[] =
{
RX_PW_P0, RX_PW_P1, RX_PW_P2, RX_PW_P3, RX_PW_P4, RX_PW_P5
};
const uint8_t child_pipe_enable[] =
{
ERX_P0, ERX_P1, ERX_P2, ERX_P3, ERX_P4, ERX_P5
};
// If this is pipe 0, cache the address. This is needed because
// openWritingPipe() will overwrite the pipe 0 address, so
// startListening() will have to restore it.
if (child == 0)
pipe0_reading_address = value;
if (child <= 5)
{
// For pipes 2-5, only write the LSB
if ( child < 2 )
write_register(child_pipe[child], reinterpret_cast<uint8_t*>(&value), 5);
else
write_register(child_pipe[child], reinterpret_cast<uint8_t*>(&value), 1);
write_register(child_payload_size[child],payload_size);
// Note it would be more efficient to set all of the bits for all open
// pipes at once. However, I thought it would make the calling code
// more simple to do it this way.
write_register(EN_RXADDR,read_register(EN_RXADDR) | _BV(child_pipe_enable[child]));
}
}
/******************************************************************/
void RF24::toggle_features(void)
{
csn(LOW);
SPI.transfer( ACTIVATE );
SPI.transfer( 0x73 );
csn(HIGH);
}
/******************************************************************/
void RF24::enableDynamicPayloads(void)
{
// Enable dynamic payload throughout the system
write_register(FEATURE,read_register(FEATURE) | _BV(EN_DPL) );
// If it didn't work, the features are not enabled
if ( ! read_register(FEATURE) )
{
// So enable them and try again
toggle_features();
write_register(FEATURE,read_register(FEATURE) | _BV(EN_DPL) );
}
IF_SERIAL_DEBUG(printf("FEATURE=%i\n\r",read_register(FEATURE)));
// Enable dynamic payload on all pipes
//
// Not sure the use case of only having dynamic payload on certain
// pipes, so the library does not support it.
write_register(DYNPD,read_register(DYNPD) | _BV(DPL_P5) | _BV(DPL_P4) | _BV(DPL_P3) | _BV(DPL_P2) | _BV(DPL_P1) | _BV(DPL_P0));
}
/******************************************************************/
void RF24::enableAckPayload(void)
{
//
// enable ack payload and dynamic payload features
//
write_register(FEATURE,read_register(FEATURE) | _BV(EN_ACK_PAY) | _BV(EN_DPL) );
// If it didn't work, the features are not enabled
if ( ! read_register(FEATURE) )
{
// So enable them and try again
toggle_features();
write_register(FEATURE,read_register(FEATURE) | _BV(EN_ACK_PAY) | _BV(EN_DPL) );
}
IF_SERIAL_DEBUG(printf("FEATURE=%i\n\r",read_register(FEATURE)));
//
// Enable dynamic payload on pipes 0 & 1
//
write_register(DYNPD,read_register(DYNPD) | _BV(DPL_P1) | _BV(DPL_P0));
}
/******************************************************************/
void RF24::writeAckPayload(uint8_t pipe, const void* buf, uint8_t len)
{
const uint8_t* current = reinterpret_cast<const uint8_t*>(buf);
csn(LOW);
SPI.transfer( W_ACK_PAYLOAD | ( pipe & B111 ) );
uint8_t data_len = min(len,32);
while ( data_len-- )
SPI.transfer(*current++);
csn(HIGH);
}
/******************************************************************/
bool RF24::isAckPayloadAvailable(void)
{
bool result = ack_payload_available;
ack_payload_available = false;
return result;
}
/******************************************************************/
void RF24::setAutoAck(bool enable)
{
if ( enable )
write_register(EN_AA, B111111);
else
write_register(EN_AA, 0);
}
/******************************************************************/
bool RF24::testCarrier(void)
{
return ( read_register(CD) & 1 );
}
/******************************************************************/
void RF24::setDataRate(rf24_datarate_e speed)
{
uint8_t setup = read_register(RF_SETUP) & _BV(RF_DR);
if (speed == RF24_2MBPS)
setup |= _BV(RF_DR);
write_register(RF_SETUP,setup);
}
/******************************************************************/
void RF24::setCRCLength(rf24_crclength_e length)
{
uint8_t config = read_register(CONFIG) & _BV(CRCO);
if (length == RF24_CRC_16)
config |= _BV(CRCO);
write_register(CONFIG,config);
}
/******************************************************************/
void RF24::setRetries(uint8_t delay, uint8_t count)
{
write_register(SETUP_RETR,(delay&0xf)<<ARD | (count&0xf)<<ARC);
}
// vim:ai:cin:sts=2 sw=2 ft=cpp
Reference in New Issue View Git Blame Copy Permalink