2018-01-06 17:54:51 +00:00
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/*
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* This file is part of the stmbl project.
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*
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* Copyright (C) 2013-2018 Rene Hopf <renehopf@mac.com>
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* Copyright (C) 2013-2018 Nico Stute <crinq@crinq.de>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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2017-12-30 01:55:59 +00:00
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#include "stm32f1xx_hal.h"
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#include "defines.h"
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2018-01-06 22:11:22 +00:00
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#include "setup.h"
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2018-02-09 07:53:25 +00:00
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#include "config.h"
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2017-12-30 01:55:59 +00:00
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void SystemClock_Config(void);
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extern TIM_HandleTypeDef htim_left;
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extern TIM_HandleTypeDef htim_right;
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extern ADC_HandleTypeDef hadc1;
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extern ADC_HandleTypeDef hadc2;
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2018-01-06 21:59:15 +00:00
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extern volatile adc_buf_t adc_buffer;
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2018-01-06 17:54:51 +00:00
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2018-02-09 07:53:25 +00:00
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extern volatile int pwml;
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extern volatile int pwmr;
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2017-12-30 01:55:59 +00:00
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2017-12-30 03:07:09 +00:00
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int milli_vel_error_sum = 0;
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2018-01-06 22:33:34 +00:00
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int main(void) {
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2017-12-30 01:55:59 +00:00
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HAL_Init();
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2018-01-06 22:11:22 +00:00
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__HAL_RCC_AFIO_CLK_ENABLE();
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HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
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/* System interrupt init*/
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/* MemoryManagement_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(MemoryManagement_IRQn, 0, 0);
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/* BusFault_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(BusFault_IRQn, 0, 0);
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/* UsageFault_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(UsageFault_IRQn, 0, 0);
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/* SVCall_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(SVCall_IRQn, 0, 0);
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/* DebugMonitor_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DebugMonitor_IRQn, 0, 0);
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/* PendSV_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(PendSV_IRQn, 0, 0);
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/* SysTick_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
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2017-12-30 01:55:59 +00:00
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SystemClock_Config();
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__HAL_RCC_DMA1_CLK_DISABLE();
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MX_GPIO_Init();
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MX_TIM_Init();
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MX_ADC1_Init();
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MX_ADC2_Init();
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2018-01-06 21:59:15 +00:00
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UART_Init();
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2017-12-30 01:55:59 +00:00
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HAL_GPIO_WritePin(OFF_PORT, OFF_PIN, 1);
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2018-01-06 22:33:34 +00:00
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2017-12-30 01:55:59 +00:00
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HAL_ADC_Start(&hadc1);
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HAL_ADC_Start(&hadc2);
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2018-01-06 22:33:34 +00:00
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while(1) {
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2018-01-03 22:55:54 +00:00
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HAL_Delay(0);
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2018-01-06 17:54:51 +00:00
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// int milli_cur = 3000;
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// int milli_volt = milli_cur * MILLI_R / 1000;// + vel * MILLI_PSI * 141;
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// // pwm = milli_volt * pwm_res / MILLI_V;
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// int milli_vel_cmd = 200;
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// int milli_vel_error = milli_vel_cmd - vel;
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// milli_vel_error_sum += milli_vel_error;
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// milli_vel_error_sum = CLAMP(milli_vel_error_sum, -200000, 200000);
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// pwm = CLAMP(milli_vel_cmd / 5 + milli_vel_error_sum / 200, -500, 500);
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2018-01-07 02:11:55 +00:00
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// cmdl = 70;
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2018-01-06 21:59:15 +00:00
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pwml = 150;
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pwmr = 150;
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2018-01-06 17:54:51 +00:00
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// if(vel > milli_vel_cmd){
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// HAL_GPIO_WritePin(LED_PORT, LED_PIN, 1);
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// }
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// else{
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// HAL_GPIO_WritePin(LED_PORT, LED_PIN, 0);
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// }
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2017-12-30 01:55:59 +00:00
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}
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}
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/** System Clock Configuration
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*/
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2018-01-06 22:33:34 +00:00
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void SystemClock_Config(void) {
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2017-12-30 01:55:59 +00:00
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RCC_OscInitTypeDef RCC_OscInitStruct;
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RCC_ClkInitTypeDef RCC_ClkInitStruct;
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RCC_PeriphCLKInitTypeDef PeriphClkInit;
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2018-02-09 07:53:25 +00:00
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/**Initializes the CPU, AHB and APB busses clocks
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2017-12-30 01:55:59 +00:00
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*/
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2018-01-06 22:33:34 +00:00
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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2017-12-30 01:55:59 +00:00
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RCC_OscInitStruct.HSICalibrationValue = 16;
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2018-01-06 22:33:34 +00:00
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
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RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16;
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2018-01-06 22:11:22 +00:00
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HAL_RCC_OscConfig(&RCC_OscInitStruct);
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2017-12-30 01:55:59 +00:00
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2018-02-09 07:53:25 +00:00
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/**Initializes the CPU, AHB and APB busses clocks
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2017-12-30 01:55:59 +00:00
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*/
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2018-01-06 22:33:34 +00:00
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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2017-12-30 01:55:59 +00:00
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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2018-01-06 22:11:22 +00:00
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HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
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2017-12-30 01:55:59 +00:00
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PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
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2018-01-06 22:33:34 +00:00
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PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV8;
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2018-01-06 22:11:22 +00:00
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HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit);
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2017-12-30 01:55:59 +00:00
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2018-02-09 07:53:25 +00:00
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/**Configure the Systick interrupt time
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2017-12-30 01:55:59 +00:00
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*/
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2018-01-06 22:33:34 +00:00
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HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / 1000);
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2017-12-30 01:55:59 +00:00
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2018-02-09 07:53:25 +00:00
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/**Configure the Systick
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2017-12-30 01:55:59 +00:00
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*/
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HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
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/* SysTick_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
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}
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