940 lines
32 KiB
C
940 lines
32 KiB
C
/**
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******************************************************************************
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* @file stm32f1xx_hal_dac.c
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* @author MCD Application Team
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* @version V1.1.1
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* @date 12-May-2017
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* @brief DAC HAL module driver.
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* This file provides firmware functions to manage the following
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* functionalities of the Digital to Analog Converter (DAC) peripheral:
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* + Initialization and de-initialization functions
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* + IO operation functions
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* + Peripheral Control functions
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* + Peripheral State and Errors functions
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*
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*
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@verbatim
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==============================================================================
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##### DAC Peripheral features #####
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==============================================================================
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[..]
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*** DAC Channels ***
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====================
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[..]
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The device integrates two 12-bit Digital Analog Converters that can
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be used independently or simultaneously (dual mode):
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(#) DAC channel1 with DAC_OUT1 (PA4) as output
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(#) DAC channel2 with DAC_OUT2 (PA5) as output
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*** DAC Triggers ***
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====================
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[..]
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Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE
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and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register.
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[..]
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Digital to Analog conversion can be triggered by:
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(#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9.
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The used pin (GPIOx_PIN_9) must be configured in input mode.
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(#) Timers TRGO: TIM2, TIM4, TIM6, TIM7
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For STM32F10x connectivity line devices and STM32F100x devices: TIM3
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For STM32F10x high-density and XL-density devices: TIM8
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For STM32F100x high-density value line devices: TIM15 as
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replacement of TIM5.
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(DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T4_TRGO...)
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(#) Software using DAC_TRIGGER_SOFTWARE
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*** DAC Buffer mode feature ***
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===============================
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[..]
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Each DAC channel integrates an output buffer that can be used to
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reduce the output impedance, and to drive external loads directly
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without having to add an external operational amplifier.
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To enable, the output buffer use
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sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
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[..]
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(@) Refer to the device datasheet for more details about output
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impedance value with and without output buffer.
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*** DAC connect feature ***
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===============================
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[..]
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Each DAC channel can be connected internally.
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To connect, use
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sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_ENABLE;
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*** GPIO configurations guidelines ***
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=====================
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[..]
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When a DAC channel is used (ex channel1 on PA4) and the other is not
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(ex channel1 on PA5 is configured in Analog and disabled).
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Channel1 may disturb channel2 as coupling effect.
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Note that there is no coupling on channel2 as soon as channel2 is turned on.
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Coupling on adjacent channel could be avoided as follows:
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when unused PA5 is configured as INPUT PULL-UP or DOWN.
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PA5 is configured in ANALOG just before it is turned on.
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*** DAC wave generation feature ***
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===================================
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[..]
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Both DAC channels can be used to generate
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(#) Noise wave using HAL_DACEx_NoiseWaveGenerate()
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(#) Triangle wave using HAL_DACEx_TriangleWaveGenerate()
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*** DAC data format ***
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=======================
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[..]
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The DAC data format can be:
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(#) 8-bit right alignment using DAC_ALIGN_8B_R
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(#) 12-bit left alignment using DAC_ALIGN_12B_L
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(#) 12-bit right alignment using DAC_ALIGN_12B_R
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*** DAC data value to voltage correspondance ***
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================================================
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[..]
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The analog output voltage on each DAC channel pin is determined
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by the following equation:
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[..]
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DAC_OUTx = VREF+ * DOR / 4095
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(+) with DOR is the Data Output Register
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[..]
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VEF+ is the input voltage reference (refer to the device datasheet)
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[..]
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e.g. To set DAC_OUT1 to 0.7V, use
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(+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
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*** DMA requests ***
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=====================
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[..]
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A DMA1 request can be generated when an external trigger (but not
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a software trigger) occurs if DMA1 requests are enabled using
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HAL_DAC_Start_DMA()
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[..]
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DMA requests are mapped as following:
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(#) DAC channel1 :
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For STM32F100x low-density, medium-density, high-density with DAC
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DMA remap:
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mapped on DMA1 channel3 which must be
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already configured
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For STM32F100x high-density without DAC DMA remap and other
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STM32F1 devices:
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mapped on DMA2 channel3 which must be
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already configured
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(#) DAC channel2 :
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For STM32F100x low-density, medium-density, high-density with DAC
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DMA remap:
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mapped on DMA1 channel4 which must be
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already configured
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For STM32F100x high-density without DAC DMA remap and other
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STM32F1 devices:
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mapped on DMA2 channel4 which must be
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already configured
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##### How to use this driver #####
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==============================================================================
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[..]
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(+) DAC APB clock must be enabled to get write access to DAC
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registers using HAL_DAC_Init()
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(+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode.
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(+) Configure the DAC channel using HAL_DAC_ConfigChannel() function.
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(+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA functions
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*** Polling mode IO operation ***
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=================================
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[..]
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(+) Start the DAC peripheral using HAL_DAC_Start()
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(+) To read the DAC last data output value, use the HAL_DAC_GetValue() function.
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(+) Stop the DAC peripheral using HAL_DAC_Stop()
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*** DMA mode IO operation ***
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==============================
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[..]
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(+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length
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of data to be transferred at each end of conversion
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(+) At the middle of data transfer HAL_DACEx_ConvHalfCpltCallbackCh1()or HAL_DACEx_ConvHalfCpltCallbackCh2()
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function is executed and user can add his own code by customization of function pointer
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HAL_DAC_ConvHalfCpltCallbackCh1 or HAL_DAC_ConvHalfCpltCallbackCh2
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(+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1()or HAL_DAC_ConvCpltCallbackCh2()
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function is executed and user can add his own code by customization of function pointer
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HAL_DAC_ConvCpltCallbackCh1 or HAL_DAC_ConvCpltCallbackCh2
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(+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() or HAL_DACEx_ErrorCallbackCh2() function is executed and user can
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add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1 or HAL_DACEx_ErrorCallbackCh2
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(+) For STM32F100x devices with specific feature: DMA underrun.
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In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler.
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HAL_DAC_DMAUnderrunCallbackCh1()or HAL_DACEx_DMAUnderrunCallbackCh2()
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function is executed and user can add his own code by customization of function pointer
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HAL_DAC_DMAUnderrunCallbackCh1 or HAL_DACEx_DMAUnderrunCallbackCh2
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add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1
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(+) Stop the DAC peripheral using HAL_DAC_Stop_DMA()
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*** DAC HAL driver macros list ***
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=============================================
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[..]
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Below the list of most used macros in DAC HAL driver.
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(+) __HAL_DAC_ENABLE : Enable the DAC peripheral (For STM32F100x devices with specific feature: DMA underrun)
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(+) __HAL_DAC_DISABLE : Disable the DAC peripheral (For STM32F100x devices with specific feature: DMA underrun)
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(+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags (For STM32F100x devices with specific feature: DMA underrun)
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(+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status (For STM32F100x devices with specific feature: DMA underrun)
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[..]
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(@) You can refer to the DAC HAL driver header file for more useful macros
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@endverbatim
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f1xx_hal.h"
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/** @addtogroup STM32F1xx_HAL_Driver
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* @{
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*/
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/** @defgroup DAC DAC
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* @brief DAC driver modules
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* @{
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*/
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#ifdef HAL_DAC_MODULE_ENABLED
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#if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Exported functions -------------------------------------------------------*/
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/** @defgroup DAC_Exported_Functions DAC Exported Functions
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* @{
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*/
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/** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions
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* @brief Initialization and Configuration functions
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*
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@verbatim
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==============================================================================
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##### Initialization and de-initialization functions #####
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==============================================================================
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[..] This section provides functions allowing to:
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(+) Initialize and configure the DAC.
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(+) De-initialize the DAC.
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@endverbatim
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* @{
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*/
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/**
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* @brief Initializes the DAC peripheral according to the specified parameters
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* in the DAC_InitStruct.
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* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
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* the configuration information for the specified DAC.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac)
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{
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/* Check DAC handle */
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if(hdac == NULL)
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{
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return HAL_ERROR;
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}
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/* Check the parameters */
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assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
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if(hdac->State == HAL_DAC_STATE_RESET)
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{
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/* Allocate lock resource and initialize it */
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hdac->Lock = HAL_UNLOCKED;
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/* Init the low level hardware */
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HAL_DAC_MspInit(hdac);
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}
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/* Initialize the DAC state*/
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hdac->State = HAL_DAC_STATE_BUSY;
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/* Set DAC error code to none */
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hdac->ErrorCode = HAL_DAC_ERROR_NONE;
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/* Initialize the DAC state*/
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hdac->State = HAL_DAC_STATE_READY;
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/* Return function status */
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return HAL_OK;
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}
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/**
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* @brief Deinitializes the DAC peripheral registers to their default reset values.
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* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
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* the configuration information for the specified DAC.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac)
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{
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/* Check DAC handle */
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if(hdac == NULL)
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{
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return HAL_ERROR;
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}
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/* Check the parameters */
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assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
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/* Change DAC state */
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hdac->State = HAL_DAC_STATE_BUSY;
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/* DeInit the low level hardware */
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HAL_DAC_MspDeInit(hdac);
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/* Set DAC error code to none */
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hdac->ErrorCode = HAL_DAC_ERROR_NONE;
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/* Change DAC state */
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hdac->State = HAL_DAC_STATE_RESET;
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/* Release Lock */
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__HAL_UNLOCK(hdac);
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/* Return function status */
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return HAL_OK;
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}
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/**
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* @brief Initializes the DAC MSP.
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* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
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* the configuration information for the specified DAC.
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* @retval None
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*/
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__weak void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
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{
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/* Prevent unused argument(s) compilation warning */
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UNUSED(hdac);
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/* NOTE : This function Should not be modified, when the callback is needed,
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the HAL_DAC_MspInit could be implemented in the user file
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*/
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}
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/**
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* @brief DeInitializes the DAC MSP.
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* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
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* the configuration information for the specified DAC.
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* @retval None
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*/
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__weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac)
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{
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/* Prevent unused argument(s) compilation warning */
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UNUSED(hdac);
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/* NOTE : This function Should not be modified, when the callback is needed,
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the HAL_DAC_MspDeInit could be implemented in the user file
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*/
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}
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/**
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* @}
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*/
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/** @defgroup DAC_Exported_Functions_Group2 IO operation functions
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* @brief IO operation functions
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*
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@verbatim
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==============================================================================
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##### IO operation functions #####
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==============================================================================
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[..] This section provides functions allowing to:
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(+) Start conversion.
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(+) Stop conversion.
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(+) Start conversion and enable DMA transfer.
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(+) Stop conversion and disable DMA transfer.
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(+) Get result of conversion.
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@endverbatim
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* @{
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*/
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/**
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* @brief Enables DAC and starts conversion of channel.
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* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
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* the configuration information for the specified DAC.
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* @param Channel: The selected DAC channel.
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* This parameter can be one of the following values:
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* @arg DAC_CHANNEL_1: DAC Channel1 selected
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* @arg DAC_CHANNEL_2: DAC Channel2 selected
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
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{
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/* Check the parameters */
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assert_param(IS_DAC_CHANNEL(Channel));
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/* Process locked */
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__HAL_LOCK(hdac);
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/* Change DAC state */
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hdac->State = HAL_DAC_STATE_BUSY;
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/* Enable the Peripharal */
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__HAL_DAC_ENABLE(hdac, Channel);
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if(Channel == DAC_CHANNEL_1)
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{
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/* Check if software trigger enabled */
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if((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == (DAC_CR_TEN1 | DAC_CR_TSEL1))
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{
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/* Enable the selected DAC software conversion */
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SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
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}
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}
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else
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{
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/* Check if software trigger enabled */
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if((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_CR_TEN2 | DAC_CR_TSEL2))
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{
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/* Enable the selected DAC software conversion*/
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SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
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}
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}
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/* Change DAC state */
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hdac->State = HAL_DAC_STATE_READY;
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/* Process unlocked */
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__HAL_UNLOCK(hdac);
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/* Return function status */
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return HAL_OK;
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}
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/**
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* @brief Disables DAC and stop conversion of channel.
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* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
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* the configuration information for the specified DAC.
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* @param Channel: The selected DAC channel.
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* This parameter can be one of the following values:
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* @arg DAC_CHANNEL_1: DAC Channel1 selected
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* @arg DAC_CHANNEL_2: DAC Channel2 selected
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel)
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{
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/* Check the parameters */
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assert_param(IS_DAC_CHANNEL(Channel));
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/* Disable the Peripheral */
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__HAL_DAC_DISABLE(hdac, Channel);
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/* Change DAC state */
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hdac->State = HAL_DAC_STATE_READY;
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/* Return function status */
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return HAL_OK;
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}
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/**
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* @brief Enables DAC and starts conversion of channel.
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* Note: For STM32F100x devices with specific feature: DMA underrun.
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* On these devices, this function enables the interruption of DMA
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* underrun.
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* (refer to redefinition of this function in DAC extended file)
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* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
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* the configuration information for the specified DAC.
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* @param Channel: The selected DAC channel.
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* This parameter can be one of the following values:
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* @arg DAC_CHANNEL_1: DAC Channel1 selected
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* @arg DAC_CHANNEL_2: DAC Channel2 selected
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* @param pData: The Source memory Buffer address.
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* @param Length: The length of data to be transferred from memory to DAC peripheral
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* @param Alignment: Specifies the data alignment for DAC channel.
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* This parameter can be one of the following values:
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* @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
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* @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
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* @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
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* @retval HAL status
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*/
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__weak HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
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{
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uint32_t tmpreg = 0U;
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/* Check the parameters */
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assert_param(IS_DAC_CHANNEL(Channel));
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assert_param(IS_DAC_ALIGN(Alignment));
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/* Process locked */
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__HAL_LOCK(hdac);
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/* Change DAC state */
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hdac->State = HAL_DAC_STATE_BUSY;
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if(Channel == DAC_CHANNEL_1)
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{
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/* Set the DMA transfer complete callback for channel1 */
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hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
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/* Set the DMA half transfer complete callback for channel1 */
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hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
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/* Set the DMA error callback for channel1 */
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hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
|
|
|
|
/* Enable the selected DAC channel1 DMA request */
|
|
SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
|
|
|
|
/* Case of use of channel 1 */
|
|
switch(Alignment)
|
|
{
|
|
case DAC_ALIGN_12B_R:
|
|
/* Get DHR12R1 address */
|
|
tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
|
|
break;
|
|
case DAC_ALIGN_12B_L:
|
|
/* Get DHR12L1 address */
|
|
tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
|
|
break;
|
|
case DAC_ALIGN_8B_R:
|
|
/* Get DHR8R1 address */
|
|
tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Set the DMA transfer complete callback for channel2 */
|
|
hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
|
|
|
|
/* Set the DMA half transfer complete callback for channel2 */
|
|
hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
|
|
|
|
/* Set the DMA error callback for channel2 */
|
|
hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
|
|
|
|
/* Enable the selected DAC channel2 DMA request */
|
|
SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
|
|
|
|
/* Case of use of channel 2 */
|
|
switch(Alignment)
|
|
{
|
|
case DAC_ALIGN_12B_R:
|
|
/* Get DHR12R2 address */
|
|
tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
|
|
break;
|
|
case DAC_ALIGN_12B_L:
|
|
/* Get DHR12L2 address */
|
|
tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
|
|
break;
|
|
case DAC_ALIGN_8B_R:
|
|
/* Get DHR8R2 address */
|
|
tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
/* Enable the DMA channel */
|
|
if(Channel == DAC_CHANNEL_1)
|
|
{
|
|
/* Enable the DMA channel */
|
|
HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
|
|
}
|
|
else
|
|
{
|
|
/* Enable the DMA channel */
|
|
HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
|
|
}
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hdac);
|
|
|
|
/* Enable the Peripharal */
|
|
__HAL_DAC_ENABLE(hdac, Channel);
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Disables DAC and stop conversion of channel.
|
|
* Note: For STM32F100x devices with specific feature: DMA underrun.
|
|
* On these devices, this function disables the interruption of DMA
|
|
* underrun.
|
|
* (refer to redefinition of this function in DAC extended file)
|
|
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DAC.
|
|
* @param Channel: The selected DAC channel.
|
|
* This parameter can be one of the following values:
|
|
* @arg DAC_CHANNEL_1: DAC Channel1 selected
|
|
* @arg DAC_CHANNEL_2: DAC Channel2 selected
|
|
* @retval HAL status
|
|
*/
|
|
__weak HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel)
|
|
{
|
|
HAL_StatusTypeDef status = HAL_OK;
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_DAC_CHANNEL(Channel));
|
|
|
|
/* Disable the selected DAC channel DMA request */
|
|
CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1 << Channel);
|
|
|
|
/* Disable the Peripharal */
|
|
__HAL_DAC_DISABLE(hdac, Channel);
|
|
|
|
/* Disable the DMA Channel */
|
|
/* Channel1 is used */
|
|
if (Channel == DAC_CHANNEL_1)
|
|
{
|
|
status = HAL_DMA_Abort(hdac->DMA_Handle1);
|
|
}
|
|
else /* Channel2 is used for */
|
|
{
|
|
status = HAL_DMA_Abort(hdac->DMA_Handle2);
|
|
}
|
|
|
|
/* Check if DMA Channel effectively disabled */
|
|
if (status != HAL_OK)
|
|
{
|
|
/* Update ADC state machine to error */
|
|
hdac->State = HAL_DAC_STATE_ERROR;
|
|
}
|
|
else
|
|
{
|
|
/* Change DAC state */
|
|
hdac->State = HAL_DAC_STATE_READY;
|
|
}
|
|
|
|
/* Return function status */
|
|
return status;
|
|
}
|
|
|
|
/**
|
|
* @brief Returns the last data output value of the selected DAC channel.
|
|
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DAC.
|
|
* @param Channel: The selected DAC channel.
|
|
* This parameter can be one of the following values:
|
|
* @arg DAC_CHANNEL_1: DAC Channel1 selected
|
|
* @arg DAC_CHANNEL_2: DAC Channel2 selected
|
|
* @retval The selected DAC channel data output value.
|
|
*/
|
|
uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_DAC_CHANNEL(Channel));
|
|
|
|
/* Returns the DAC channel data output register value */
|
|
if(Channel == DAC_CHANNEL_1)
|
|
{
|
|
return hdac->Instance->DOR1;
|
|
}
|
|
else
|
|
{
|
|
return hdac->Instance->DOR2;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief Conversion complete callback in non blocking mode for Channel1
|
|
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DAC.
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac)
|
|
{
|
|
/* Prevent unused argument(s) compilation warning */
|
|
UNUSED(hdac);
|
|
/* NOTE : This function Should not be modified, when the callback is needed,
|
|
the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file
|
|
*/
|
|
}
|
|
|
|
/**
|
|
* @brief Conversion half DMA transfer callback in non blocking mode for Channel1
|
|
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DAC.
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac)
|
|
{
|
|
/* Prevent unused argument(s) compilation warning */
|
|
UNUSED(hdac);
|
|
/* NOTE : This function Should not be modified, when the callback is needed,
|
|
the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file
|
|
*/
|
|
}
|
|
|
|
/**
|
|
* @brief Error DAC callback for Channel1.
|
|
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DAC.
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac)
|
|
{
|
|
/* Prevent unused argument(s) compilation warning */
|
|
UNUSED(hdac);
|
|
/* NOTE : This function Should not be modified, when the callback is needed,
|
|
the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file
|
|
*/
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions
|
|
* @brief Peripheral Control functions
|
|
*
|
|
@verbatim
|
|
==============================================================================
|
|
##### Peripheral Control functions #####
|
|
==============================================================================
|
|
[..] This section provides functions allowing to:
|
|
(+) Configure channels.
|
|
(+) Set the specified data holding register value for DAC channel.
|
|
|
|
@endverbatim
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief Configures the selected DAC channel.
|
|
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DAC.
|
|
* @param sConfig: DAC configuration structure.
|
|
* @param Channel: The selected DAC channel.
|
|
* This parameter can be one of the following values:
|
|
* @arg DAC_CHANNEL_1: DAC Channel1 selected
|
|
* @arg DAC_CHANNEL_2: DAC Channel2 selected
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel)
|
|
{
|
|
uint32_t tmpreg1 = 0U;
|
|
|
|
/* Check the DAC parameters */
|
|
assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
|
|
assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
|
|
assert_param(IS_DAC_CHANNEL(Channel));
|
|
|
|
/* Process locked */
|
|
__HAL_LOCK(hdac);
|
|
|
|
/* Change DAC state */
|
|
hdac->State = HAL_DAC_STATE_BUSY;
|
|
|
|
/* Configure for the selected DAC channel: buffer output, trigger */
|
|
/* Set TSELx and TENx bits according to DAC_Trigger value */
|
|
/* Set BOFFx bit according to DAC_OutputBuffer value */
|
|
SET_BIT(tmpreg1, (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer));
|
|
|
|
/* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
|
|
/* Calculate CR register value depending on DAC_Channel */
|
|
MODIFY_REG(hdac->Instance->CR,
|
|
((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << Channel,
|
|
tmpreg1 << Channel);
|
|
|
|
/* Disable wave generation */
|
|
hdac->Instance->CR &= ~(DAC_CR_WAVE1 << Channel);
|
|
|
|
/* Change DAC state */
|
|
hdac->State = HAL_DAC_STATE_READY;
|
|
|
|
/* Process unlocked */
|
|
__HAL_UNLOCK(hdac);
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Set the specified data holding register value for DAC channel.
|
|
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DAC.
|
|
* @param Channel: The selected DAC channel.
|
|
* This parameter can be one of the following values:
|
|
* @arg DAC_CHANNEL_1: DAC Channel1 selected
|
|
* @arg DAC_CHANNEL_2: DAC Channel2 selected
|
|
* @param Alignment: Specifies the data alignment.
|
|
* This parameter can be one of the following values:
|
|
* @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
|
|
* @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
|
|
* @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
|
|
* @param Data: Data to be loaded in the selected data holding register.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
|
|
{
|
|
__IO uint32_t tmp = 0U;
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_DAC_CHANNEL(Channel));
|
|
assert_param(IS_DAC_ALIGN(Alignment));
|
|
assert_param(IS_DAC_DATA(Data));
|
|
|
|
tmp = (uint32_t)hdac->Instance;
|
|
if(Channel == DAC_CHANNEL_1)
|
|
{
|
|
tmp += DAC_DHR12R1_ALIGNMENT(Alignment);
|
|
}
|
|
else
|
|
{
|
|
tmp += DAC_DHR12R2_ALIGNMENT(Alignment);
|
|
}
|
|
|
|
/* Set the DAC channel selected data holding register */
|
|
*(__IO uint32_t *) tmp = Data;
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions
|
|
* @brief Peripheral State and Errors functions
|
|
*
|
|
@verbatim
|
|
==============================================================================
|
|
##### Peripheral State and Errors functions #####
|
|
==============================================================================
|
|
[..]
|
|
This subsection provides functions allowing to
|
|
(+) Check the DAC state.
|
|
(+) Check the DAC Errors.
|
|
|
|
@endverbatim
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief return the DAC state
|
|
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DAC.
|
|
* @retval HAL state
|
|
*/
|
|
HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac)
|
|
{
|
|
/* Return DAC state */
|
|
return hdac->State;
|
|
}
|
|
|
|
|
|
/**
|
|
* @brief Return the DAC error code
|
|
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DAC.
|
|
* @retval DAC Error Code
|
|
*/
|
|
uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac)
|
|
{
|
|
return hdac->ErrorCode;
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @addtogroup DAC_Private_Functions
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief DMA conversion complete callback.
|
|
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DMA module.
|
|
* @retval None
|
|
*/
|
|
void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
|
|
{
|
|
DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
|
|
|
|
HAL_DAC_ConvCpltCallbackCh1(hdac);
|
|
|
|
hdac->State = HAL_DAC_STATE_READY;
|
|
}
|
|
|
|
/**
|
|
* @brief DMA half transfer complete callback.
|
|
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DMA module.
|
|
* @retval None
|
|
*/
|
|
void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
|
|
{
|
|
DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
|
|
/* Conversion complete callback */
|
|
HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
|
|
}
|
|
|
|
/**
|
|
* @brief DMA error callback
|
|
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DMA module.
|
|
* @retval None
|
|
*/
|
|
void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
|
|
{
|
|
DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
|
|
|
|
/* Set DAC error code to DMA error */
|
|
hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
|
|
|
|
HAL_DAC_ErrorCallbackCh1(hdac);
|
|
|
|
hdac->State = HAL_DAC_STATE_READY;
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#endif /* STM32F100xB || STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
|
|
#endif /* HAL_DAC_MODULE_ENABLED */
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|