2019-10-06 13:09:15 +00:00
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/*
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* File: BLDC_controller.h
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*
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* Code generated for Simulink model 'BLDC_controller'.
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*
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2019-10-21 15:51:09 +00:00
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* Model version : 1.1183
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2019-10-06 13:09:15 +00:00
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* Simulink Coder version : 8.13 (R2017b) 24-Jul-2017
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2019-10-21 15:51:09 +00:00
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* C/C++ source code generated on : Mon Oct 21 16:34:10 2019
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2019-10-06 13:09:15 +00:00
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*
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* Target selection: ert.tlc
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* Embedded hardware selection: ARM Compatible->ARM Cortex
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* Emulation hardware selection:
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* Differs from embedded hardware (MATLAB Host)
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* Code generation objectives:
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* 1. Execution efficiency
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* 2. RAM efficiency
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* Validation result: Not run
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*/
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#ifndef RTW_HEADER_BLDC_controller_h_
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#define RTW_HEADER_BLDC_controller_h_
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#include "rtwtypes.h"
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#ifndef BLDC_controller_COMMON_INCLUDES_
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# define BLDC_controller_COMMON_INCLUDES_
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#include "rtwtypes.h"
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#endif /* BLDC_controller_COMMON_INCLUDES_ */
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/* Macros for accessing real-time model data structure */
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/* Forward declaration for rtModel */
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typedef struct tag_RTM RT_MODEL;
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/* Block signals and states (auto storage) for system '<S11>/Counter' */
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typedef struct {
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int16_T UnitDelay_DSTATE; /* '<S17>/UnitDelay' */
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} DW_Counter;
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/* Block signals and states (auto storage) for system '<S31>/Low_Pass_Filter' */
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typedef struct {
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int16_T UnitDelay3_DSTATE[2]; /* '<S44>/UnitDelay3' */
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} DW_Low_Pass_Filter;
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/* Block signals and states (auto storage) for system '<S40>/PI_backCalc_fixdt_Id' */
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typedef struct {
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int32_T UnitDelay_DSTATE; /* '<S61>/UnitDelay' */
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int32_T UnitDelay_DSTATE_l; /* '<S63>/UnitDelay' */
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} DW_PI_backCalc_fixdt;
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/* Block signals and states (auto storage) for system '<S38>/PI_backCalc_fixdt_n' */
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typedef struct {
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int32_T UnitDelay_DSTATE; /* '<S53>/UnitDelay' */
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int32_T UnitDelay_DSTATE_h; /* '<S55>/UnitDelay' */
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} DW_PI_backCalc_fixdt_f;
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/* Block signals and states (auto storage) for system '<S36>/Rate_Limiter' */
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typedef struct {
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int32_T UnitDelay_DSTATE; /* '<S51>/UnitDelay' */
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} DW_Rate_Limiter;
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/* Block signals and states (auto storage) for system '<S22>/Counter' */
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typedef struct {
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uint16_T UnitDelay_DSTATE; /* '<S27>/UnitDelay' */
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} DW_Counter_l;
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/* Block signals and states (auto storage) for system '<S18>/either_edge' */
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typedef struct {
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boolean_T UnitDelay_DSTATE; /* '<S23>/UnitDelay' */
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} DW_either_edge;
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/* Block signals and states (auto storage) for system '<S3>/Debounce_Filter' */
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typedef struct {
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DW_either_edge either_edge_k; /* '<S18>/either_edge' */
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DW_Counter_l Counter_h; /* '<S21>/Counter' */
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DW_Counter_l Counter_i0; /* '<S22>/Counter' */
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boolean_T UnitDelay_DSTATE; /* '<S18>/UnitDelay' */
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} DW_Debounce_Filter;
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/* Block signals and states (auto storage) for system '<Root>' */
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typedef struct {
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DW_either_edge either_edge_a; /* '<S3>/either_edge' */
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DW_Debounce_Filter Debounce_Filter_f;/* '<S3>/Debounce_Filter' */
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DW_Rate_Limiter Rate_Limiter_l; /* '<S36>/Rate_Limiter' */
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DW_PI_backCalc_fixdt PI_backCalc_fixdt_Iq;/* '<S39>/PI_backCalc_fixdt_Iq' */
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DW_PI_backCalc_fixdt_f PI_backCalc_fixdt_n_p;/* '<S38>/PI_backCalc_fixdt_n' */
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DW_PI_backCalc_fixdt PI_backCalc_fixdt_Id;/* '<S40>/PI_backCalc_fixdt_Id' */
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DW_Low_Pass_Filter Low_Pass_Filter_m;/* '<S31>/Low_Pass_Filter' */
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DW_Counter Counter_e; /* '<S11>/Counter' */
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int16_T Gain4[3]; /* '<S33>/Gain4' */
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int16_T Sum1[2]; /* '<S44>/Sum1' */
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int16_T z_counterRawPrev; /* '<S16>/z_counterRawPrev' */
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int16_T Merge; /* '<S5>/Merge' */
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int16_T Divide1; /* '<S46>/Divide1' */
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int16_T Divide4; /* '<S45>/Divide4' */
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int16_T Switch2; /* '<S64>/Switch2' */
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int16_T Divide11; /* '<S16>/Divide11' */
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int16_T UnitDelay3_DSTATE; /* '<S11>/UnitDelay3' */
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int16_T UnitDelay4_DSTATE; /* '<S6>/UnitDelay4' */
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int16_T UnitDelay4_DSTATE_p; /* '<S16>/UnitDelay4' */
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int16_T UnitDelay2_DSTATE; /* '<S16>/UnitDelay2' */
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int16_T UnitDelay3_DSTATE_o; /* '<S16>/UnitDelay3' */
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int16_T UnitDelay5_DSTATE; /* '<S16>/UnitDelay5' */
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int16_T UnitDelay4_DSTATE_e; /* '<S11>/UnitDelay4' */
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int16_T UnitDelay4_DSTATE_er; /* '<S5>/UnitDelay4' */
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int8_T Switch2_e; /* '<S10>/Switch2' */
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int8_T UnitDelay2_DSTATE_b; /* '<S10>/UnitDelay2' */
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int8_T If2_ActiveSubsystem; /* '<S1>/If2' */
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int8_T If1_ActiveSubsystem; /* '<S1>/If1' */
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int8_T If1_ActiveSubsystem_h; /* '<S5>/If1' */
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int8_T If1_ActiveSubsystem_f; /* '<S35>/If1' */
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int8_T If2_ActiveSubsystem_c; /* '<S35>/If2' */
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int8_T SwitchCase_ActiveSubsystem; /* '<S5>/Switch Case' */
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uint8_T UnitDelay1_DSTATE; /* '<S4>/UnitDelay1' */
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uint8_T UnitDelay3_DSTATE_fy; /* '<S8>/UnitDelay3' */
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uint8_T UnitDelay1_DSTATE_m; /* '<S8>/UnitDelay1' */
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uint8_T UnitDelay2_DSTATE_f; /* '<S8>/UnitDelay2' */
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uint8_T UnitDelay_DSTATE; /* '<S3>/UnitDelay' */
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uint8_T is_active_c1_BLDC_controller;/* '<S4>/F02_02_Control_Mode_Manager' */
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uint8_T is_c1_BLDC_controller; /* '<S4>/F02_02_Control_Mode_Manager' */
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uint8_T is_ACTIVE; /* '<S4>/F02_02_Control_Mode_Manager' */
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boolean_T Merge_n; /* '<S18>/Merge' */
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boolean_T dz_cntTrnsDet; /* '<S16>/dz_cntTrnsDet' */
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2019-10-21 15:51:09 +00:00
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boolean_T UnitDelay_DSTATE_g; /* '<S50>/UnitDelay' */
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2019-10-06 13:09:15 +00:00
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boolean_T UnitDelay1_DSTATE_n; /* '<S16>/UnitDelay1' */
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boolean_T n_commDeacv_Mode; /* '<S11>/n_commDeacv' */
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2019-10-21 15:51:09 +00:00
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boolean_T n_commDeacv_Mode_c; /* '<S32>/n_commDeacv' */
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2019-10-06 13:09:15 +00:00
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boolean_T dz_cntTrnsDet_Mode; /* '<S16>/dz_cntTrnsDet' */
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} DW;
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/* Constant parameters (auto storage) */
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typedef struct {
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/* Computed Parameter: z_commutMap_M1_table
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* Referenced by: '<S6>/z_commutMap_M1'
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*/
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int16_T z_commutMap_M1_table[18];
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/* Computed Parameter: r_sin_M1_Table
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* Referenced by: '<S32>/r_sin_M1'
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*/
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int16_T r_sin_M1_Table[181];
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/* Computed Parameter: r_cos_M1_Table
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* Referenced by: '<S32>/r_cos_M1'
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*/
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int16_T r_cos_M1_Table[181];
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/* Computed Parameter: vec_hallToPos_Value
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* Referenced by: '<S9>/vec_hallToPos'
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*/
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int8_T vec_hallToPos_Value[8];
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} ConstP;
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/* External inputs (root inport signals with auto storage) */
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typedef struct {
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boolean_T b_motEna; /* '<Root>/b_motEna' */
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uint8_T z_ctrlModReq; /* '<Root>/z_ctrlModReq' */
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int16_T r_inpTgt; /* '<Root>/r_inpTgt' */
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uint8_T b_hallA; /* '<Root>/b_hallA ' */
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uint8_T b_hallB; /* '<Root>/b_hallB' */
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uint8_T b_hallC; /* '<Root>/b_hallC' */
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int16_T i_phaAB; /* '<Root>/i_phaAB' */
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int16_T i_phaBC; /* '<Root>/i_phaBC' */
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int16_T i_DCLink; /* '<Root>/i_DCLink' */
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} ExtU;
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/* External outputs (root outports fed by signals with auto storage) */
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typedef struct {
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int16_T DC_phaA; /* '<Root>/DC_phaA' */
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int16_T DC_phaB; /* '<Root>/DC_phaB' */
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int16_T DC_phaC; /* '<Root>/DC_phaC' */
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uint8_T z_errCode; /* '<Root>/z_errCode' */
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int16_T n_mot; /* '<Root>/n_mot' */
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int16_T a_elecAngle; /* '<Root>/a_elecAngle' */
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int16_T r_devSignal1; /* '<Root>/r_devSignal1' */
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int16_T r_devSignal2; /* '<Root>/r_devSignal2' */
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} ExtY;
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/* Parameters (auto storage) */
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struct P_ {
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int32_T dV_openRate; /* Variable: dV_openRate
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* Referenced by: '<S36>/dV_openRate'
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*/
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int16_T dz_cntTrnsDetHi; /* Variable: dz_cntTrnsDetHi
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* Referenced by: '<S16>/dz_cntTrnsDet'
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*/
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int16_T dz_cntTrnsDetLo; /* Variable: dz_cntTrnsDetLo
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* Referenced by: '<S16>/dz_cntTrnsDet'
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*/
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int16_T r_errInpTgtThres; /* Variable: r_errInpTgtThres
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* Referenced by: '<S3>/r_errInpTgtThres'
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*/
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int16_T z_maxCntRst; /* Variable: z_maxCntRst
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* Referenced by:
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* '<S11>/Counter'
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* '<S11>/z_maxCntRst'
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* '<S11>/z_maxCntRst2'
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* '<S11>/UnitDelay3'
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* '<S16>/z_counter'
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*/
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uint16_T cf_speedCoef; /* Variable: cf_speedCoef
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* Referenced by: '<S16>/cf_speedCoef'
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*/
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uint16_T t_errDequal; /* Variable: t_errDequal
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* Referenced by: '<S3>/t_errDequal'
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*/
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uint16_T t_errQual; /* Variable: t_errQual
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* Referenced by: '<S3>/t_errQual'
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*/
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2019-10-21 15:51:09 +00:00
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uint16_T cf_idKp; /* Variable: cf_idKp
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* Referenced by: '<S40>/cf_idKp'
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*/
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uint16_T cf_iqKp; /* Variable: cf_iqKp
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* Referenced by: '<S39>/cf_iqKp'
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*/
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uint16_T cf_nKp; /* Variable: cf_nKp
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* Referenced by: '<S38>/cf_nKp'
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*/
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2019-10-06 13:09:15 +00:00
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int16_T Vd_max; /* Variable: Vd_max
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* Referenced by:
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* '<S35>/Vd_max1'
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* '<S14>/Vd_max'
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*/
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int16_T Vq_max_M1[46]; /* Variable: Vq_max_M1
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* Referenced by: '<S35>/Vq_max_M1'
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*/
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int16_T Vq_max_XA[46]; /* Variable: Vq_max_XA
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* Referenced by: '<S35>/Vq_max_XA'
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*/
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int16_T i_max; /* Variable: i_max
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* Referenced by:
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* '<S35>/i_max'
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* '<S14>/i_max'
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*/
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2019-10-21 15:51:09 +00:00
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int16_T id_fieldWeak_M1[12]; /* Variable: id_fieldWeak_M1
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* Referenced by: '<S32>/id_fieldWeak_M1'
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*/
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2019-10-06 13:09:15 +00:00
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int16_T iq_max_M1[51]; /* Variable: iq_max_M1
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* Referenced by: '<S35>/iq_max_M1'
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*/
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int16_T iq_max_XA[51]; /* Variable: iq_max_XA
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* Referenced by: '<S35>/iq_max_XA'
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*/
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int16_T n_commAcvLo; /* Variable: n_commAcvLo
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* Referenced by: '<S11>/n_commDeacv'
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*/
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int16_T n_commDeacvHi; /* Variable: n_commDeacvHi
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* Referenced by: '<S11>/n_commDeacv'
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*/
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2019-10-21 15:51:09 +00:00
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int16_T n_fieldWeakAuthHi; /* Variable: n_fieldWeakAuthHi
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* Referenced by: '<S32>/n_commDeacv'
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*/
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int16_T n_fieldWeakAuthLo; /* Variable: n_fieldWeakAuthLo
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* Referenced by: '<S32>/n_commDeacv'
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2019-10-06 13:09:15 +00:00
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*/
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int16_T n_max; /* Variable: n_max
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* Referenced by:
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* '<S35>/n_max1'
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* '<S14>/n_max'
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*/
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int16_T n_stdStillDet; /* Variable: n_stdStillDet
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* Referenced by: '<S11>/n_stdStillDet'
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*/
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2019-10-21 15:51:09 +00:00
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int16_T r_fieldWeak_XA[12]; /* Variable: r_fieldWeak_XA
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* Referenced by: '<S32>/r_fieldWeak_XA'
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*/
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2019-10-06 13:09:15 +00:00
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uint16_T cf_currFilt; /* Variable: cf_currFilt
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* Referenced by: '<S31>/cf_currFilt'
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|
*/
|
|
|
|
|
uint16_T cf_idKb; /* Variable: cf_idKb
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|
* Referenced by: '<S40>/cf_idKb'
|
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|
|
*/
|
|
|
|
|
uint16_T cf_idKi; /* Variable: cf_idKi
|
|
|
|
|
* Referenced by: '<S40>/cf_idKi'
|
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|
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|
*/
|
|
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|
uint16_T cf_iqKb; /* Variable: cf_iqKb
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|
* Referenced by: '<S39>/cf_iqKb'
|
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|
*/
|
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|
uint16_T cf_iqKi; /* Variable: cf_iqKi
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|
* Referenced by: '<S39>/cf_iqKi'
|
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|
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|
*/
|
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|
uint16_T cf_iqKiLimProt; /* Variable: cf_iqKiLimProt
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|
* Referenced by: '<S38>/cf_iqKiLimProt'
|
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|
*/
|
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|
uint16_T cf_nKb; /* Variable: cf_nKb
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|
* Referenced by: '<S38>/cf_nKb'
|
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|
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|
*/
|
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|
uint16_T cf_nKi; /* Variable: cf_nKi
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|
* Referenced by: '<S38>/cf_nKi'
|
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|
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|
*/
|
|
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|
|
uint16_T cf_iqKpLimProt; /* Variable: cf_iqKpLimProt
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|
* Referenced by: '<S45>/cf_iqKpLimProt'
|
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|
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|
*/
|
|
|
|
|
uint16_T cf_nKpLimProt; /* Variable: cf_nKpLimProt
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|
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|
* Referenced by: '<S46>/cf_nKpLimProt'
|
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|
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|
*/
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|
uint8_T z_ctrlTypSel; /* Variable: z_ctrlTypSel
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|
* Referenced by: '<S1>/z_ctrlTypSel1'
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|
*/
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boolean_T b_diagEna; /* Variable: b_diagEna
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* Referenced by: '<S1>/b_diagEna'
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|
*/
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boolean_T b_fieldWeakEna; /* Variable: b_fieldWeakEna
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* Referenced by: '<S32>/b_fieldWeakEna'
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*/
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boolean_T b_selPhaABCurrMeas; /* Variable: b_selPhaABCurrMeas
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* Referenced by: '<S30>/b_selPhaABCurrMeas'
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*/
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|
};
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/* Parameters (auto storage) */
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|
typedef struct P_ P;
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/* Real-time Model Data Structure */
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|
struct tag_RTM {
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P *defaultParam;
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|
ExtU *inputs;
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|
ExtY *outputs;
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|
DW *dwork;
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|
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|
};
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/* Constant parameters (auto storage) */
|
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|
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|
extern const ConstP rtConstP;
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|
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|
|
|
|
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|
/* Model entry point functions */
|
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|
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|
extern void BLDC_controller_initialize(RT_MODEL *const rtM);
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|
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|
extern void BLDC_controller_step(RT_MODEL *const rtM);
|
|
|
|
|
|
|
|
|
|
/*-
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|
* These blocks were eliminated from the model due to optimizations:
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|
*
|
|
|
|
|
* Block '<S11>/Scope2' : Unused code path elimination
|
|
|
|
|
* Block '<S12>/Scope' : Unused code path elimination
|
|
|
|
|
* Block '<S47>/Data Type Duplicate' : Unused code path elimination
|
|
|
|
|
* Block '<S47>/Data Type Propagation' : Unused code path elimination
|
|
|
|
|
* Block '<S48>/Data Type Duplicate' : Unused code path elimination
|
|
|
|
|
* Block '<S48>/Data Type Propagation' : Unused code path elimination
|
|
|
|
|
* Block '<S52>/Data Type Duplicate' : Unused code path elimination
|
|
|
|
|
* Block '<S52>/Data Type Propagation' : Unused code path elimination
|
|
|
|
|
* Block '<S5>/Scope12' : Unused code path elimination
|
|
|
|
|
* Block '<S5>/Scope8' : Unused code path elimination
|
|
|
|
|
* Block '<S5>/Scope9' : Unused code path elimination
|
|
|
|
|
* Block '<S56>/Data Type Duplicate' : Unused code path elimination
|
|
|
|
|
* Block '<S56>/Data Type Propagation' : Unused code path elimination
|
|
|
|
|
* Block '<S54>/Data Type Duplicate' : Unused code path elimination
|
|
|
|
|
* Block '<S54>/Data Type Propagation' : Unused code path elimination
|
|
|
|
|
* Block '<S60>/Data Type Duplicate' : Unused code path elimination
|
|
|
|
|
* Block '<S60>/Data Type Propagation' : Unused code path elimination
|
|
|
|
|
* Block '<S58>/Data Type Duplicate' : Unused code path elimination
|
|
|
|
|
* Block '<S58>/Data Type Propagation' : Unused code path elimination
|
|
|
|
|
* Block '<S64>/Data Type Duplicate' : Unused code path elimination
|
|
|
|
|
* Block '<S64>/Data Type Propagation' : Unused code path elimination
|
|
|
|
|
* Block '<S62>/Data Type Duplicate' : Unused code path elimination
|
|
|
|
|
* Block '<S62>/Data Type Propagation' : Unused code path elimination
|
|
|
|
|
* Block '<S65>/Data Type Duplicate' : Unused code path elimination
|
|
|
|
|
* Block '<S65>/Data Type Propagation' : Unused code path elimination
|
|
|
|
|
* Block '<S1>/Data Type Conversion2' : Eliminate redundant data type conversion
|
|
|
|
|
* Block '<S1>/Data Type Conversion3' : Eliminate redundant data type conversion
|
|
|
|
|
* Block '<S1>/Data Type Conversion6' : Eliminate redundant data type conversion
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
/*-
|
|
|
|
|
* The generated code includes comments that allow you to trace directly
|
|
|
|
|
* back to the appropriate location in the model. The basic format
|
|
|
|
|
* is <system>/block_name, where system is the system number (uniquely
|
|
|
|
|
* assigned by Simulink) and block_name is the name of the block.
|
|
|
|
|
*
|
|
|
|
|
* Note that this particular code originates from a subsystem build,
|
|
|
|
|
* and has its own system numbers different from the parent model.
|
|
|
|
|
* Refer to the system hierarchy for this subsystem below, and use the
|
|
|
|
|
* MATLAB hilite_system command to trace the generated code back
|
|
|
|
|
* to the parent model. For example,
|
|
|
|
|
*
|
|
|
|
|
* hilite_system('BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller') - opens subsystem BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller
|
|
|
|
|
* hilite_system('BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/Kp') - opens and selects block Kp
|
|
|
|
|
*
|
|
|
|
|
* Here is the system hierarchy for this model
|
|
|
|
|
*
|
|
|
|
|
* '<Root>' : 'BLDCmotorControl_FOC_R2017b_fixdt'
|
|
|
|
|
* '<S1>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller'
|
|
|
|
|
* '<S2>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations'
|
|
|
|
|
* '<S3>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics'
|
|
|
|
|
* '<S4>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager'
|
|
|
|
|
* '<S5>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control'
|
|
|
|
|
* '<S6>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F05_Control_Type_Management'
|
|
|
|
|
* '<S7>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_01_Input_Scaling'
|
|
|
|
|
* '<S8>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_02_Edge_Detector'
|
|
|
|
|
* '<S9>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_03_Position_Calculation'
|
|
|
|
|
* '<S10>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_04_Direction_Detection'
|
|
|
|
|
* '<S11>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_05_Speed_Estimation'
|
|
|
|
|
* '<S12>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_06_Electrical_Angle_Estimation'
|
|
|
|
|
* '<S13>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_01_Input_Scaling/Commutation_Control_Type'
|
|
|
|
|
* '<S14>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_01_Input_Scaling/FOC_Control_Type'
|
|
|
|
|
* '<S15>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_05_Speed_Estimation/Counter'
|
|
|
|
|
* '<S16>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_05_Speed_Estimation/Raw_Motor_Speed_Estimation'
|
|
|
|
|
* '<S17>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F01_Estimations/F01_05_Speed_Estimation/Counter/rst_Delay'
|
|
|
|
|
* '<S18>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter'
|
|
|
|
|
* '<S19>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/either_edge'
|
|
|
|
|
* '<S20>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Default'
|
|
|
|
|
* '<S21>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Dequalification'
|
|
|
|
|
* '<S22>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Qualification'
|
|
|
|
|
* '<S23>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/either_edge'
|
|
|
|
|
* '<S24>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Dequalification/Counter'
|
|
|
|
|
* '<S25>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Dequalification/Counter/rst_Delay'
|
|
|
|
|
* '<S26>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Qualification/Counter'
|
|
|
|
|
* '<S27>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F02_Diagnostics/Debounce_Filter/Qualification/Counter/rst_Delay'
|
|
|
|
|
* '<S28>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F02_01_Mode_Transition_Calculation'
|
|
|
|
|
* '<S29>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F03_Control_Mode_Manager/F02_02_Control_Mode_Manager'
|
|
|
|
|
* '<S30>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Clarke_Transform'
|
|
|
|
|
* '<S31>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Current_Filtering'
|
|
|
|
|
* '<S32>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Field_Weakening'
|
|
|
|
|
* '<S33>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Inv_Clarke_Transform'
|
|
|
|
|
* '<S34>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Inv_Park_Transform'
|
|
|
|
|
* '<S35>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Motor_Limitations'
|
|
|
|
|
* '<S36>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Open_Mode'
|
|
|
|
|
* '<S37>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Park_Transform'
|
|
|
|
|
* '<S38>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Speed_Mode'
|
|
|
|
|
* '<S39>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Torque_Mode'
|
|
|
|
|
* '<S40>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Vd_Calculation'
|
|
|
|
|
* '<S41>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Voltage_Mode'
|
|
|
|
|
* '<S42>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Clarke_Transform/Clarke_PhasesAB'
|
|
|
|
|
* '<S43>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Clarke_Transform/Clarke_PhasesBC'
|
|
|
|
|
* '<S44>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Current_Filtering/Low_Pass_Filter'
|
|
|
|
|
* '<S45>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Motor_Limitations/Current_Limit_Protection'
|
|
|
|
|
* '<S46>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Motor_Limitations/Speed_Limit_Protection'
|
|
|
|
|
* '<S47>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Motor_Limitations/Current_Limit_Protection/Saturation Dynamic'
|
|
|
|
|
* '<S48>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Motor_Limitations/Speed_Limit_Protection/Saturation Dynamic1'
|
|
|
|
|
* '<S49>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Open_Mode/Rate_Limiter'
|
|
|
|
|
* '<S50>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Open_Mode/rising_edge_init'
|
|
|
|
|
* '<S51>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Open_Mode/Rate_Limiter/Delay_Init1'
|
|
|
|
|
* '<S52>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Open_Mode/Rate_Limiter/Saturation Dynamic'
|
|
|
|
|
* '<S53>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Speed_Mode/PI_backCalc_fixdt_n'
|
|
|
|
|
* '<S54>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Speed_Mode/Saturation Dynamic1'
|
|
|
|
|
* '<S55>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Speed_Mode/PI_backCalc_fixdt_n/Integrator'
|
|
|
|
|
* '<S56>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Speed_Mode/PI_backCalc_fixdt_n/Saturation Dynamic1'
|
|
|
|
|
* '<S57>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Torque_Mode/PI_backCalc_fixdt_Iq'
|
|
|
|
|
* '<S58>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Torque_Mode/Saturation Dynamic'
|
|
|
|
|
* '<S59>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Torque_Mode/PI_backCalc_fixdt_Iq/Integrator'
|
|
|
|
|
* '<S60>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Torque_Mode/PI_backCalc_fixdt_Iq/Saturation Dynamic1'
|
|
|
|
|
* '<S61>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Vd_Calculation/PI_backCalc_fixdt_Id'
|
|
|
|
|
* '<S62>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Vd_Calculation/Saturation Dynamic'
|
|
|
|
|
* '<S63>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Vd_Calculation/PI_backCalc_fixdt_Id/Integrator'
|
|
|
|
|
* '<S64>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Vd_Calculation/PI_backCalc_fixdt_Id/Saturation Dynamic1'
|
|
|
|
|
* '<S65>' : 'BLDCmotorControl_FOC_R2017b_fixdt/BLDC_controller/F04_Field_Oriented_Control/Voltage_Mode/Saturation Dynamic1'
|
|
|
|
|
*/
|
|
|
|
|
#endif /* RTW_HEADER_BLDC_controller_h_ */
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* File trailer for generated code.
|
|
|
|
|
*
|
|
|
|
|
* [EOF]
|
|
|
|
|
*/
|
