add timing diagrams

This commit is contained in:
interfisch 2023-02-11 14:41:55 +01:00
parent 6c15882b6e
commit 1dd9dc33f1
4 changed files with 52 additions and 0 deletions

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{signal: [
['Row Driver',
{name: 'sr_data', wave: 'x..........................', data: ['row data [16]']},
{name: 'sr_clk', wave: '0..........................'},
{name: 'sr_latch',wave: '0..........................'},
{name: 'sr_oe', wave: '1..........................'},
],
{},
['Column Driver',
{name: 'reset', wave: '1........0............1....'},
{name: 'data', wave: 'x........4..|..x...........', data: ['column [50]']},
{name: 'clock', wave: '0.........p.|...l..........'},
],
['Power',
{},
{name: 'clear', wave: '0.................1..0.....'},
{name: 'drive', wave: '0.................1..0.....', node: '..................A..B.....' },
]
],
edge: [
'A-B DRIVEDOTCLEAR'
]
}

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{signal: [
['Row Driver',
{name: 'sr_data', wave: 'x3..|..x...................', data: ['row data [16]']},
{name: 'sr_clk', wave: '0.p.|...l..................'},
{name: 'sr_latch',wave: '0.......pl.................'},
{name: 'sr_oe', wave: '1................0....1....'},
],
{},
['Column Driver',
{name: 'reset', wave: '1........0............1....'},
{name: 'data', wave: 'x........4..|..x...........', data: ['column [50]']},
{name: 'clock', wave: '0.........p.|...l..........'},
],
['Power',
{},
{name: 'clear', wave: '0..........................'},
{name: 'drive', wave: '0.................1..0.....', node: '..................A..B.....' },
],
],
edge: ['A-B DRIVEDOTSET']
}

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