433 lines
13 KiB
C
Executable File
433 lines
13 KiB
C
Executable File
/*
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ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file SPIv2/hal_i2s_lld.h
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* @brief STM32 I2S subsystem low level driver header.
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*
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* @addtogroup I2S
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* @{
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*/
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#ifndef HAL_I2S_LLD_H
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#define HAL_I2S_LLD_H
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#if HAL_USE_I2S || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/**
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* @name Static I2S modes
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* @{
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*/
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#define STM32_I2S_MODE_SLAVE 0
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#define STM32_I2S_MODE_MASTER 1
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#define STM32_I2S_MODE_RX 2
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#define STM32_I2S_MODE_TX 4
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#define STM32_I2S_MODE_RXTX (STM32_I2S_MODE_RX | \
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STM32_I2S_MODE_TX)
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/** @} */
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/**
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* @name Mode checks
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* @{
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*/
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#define STM32_I2S_IS_MASTER(mode) ((mode) & STM32_I2S_MODE_MASTER)
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#define STM32_I2S_RX_ENABLED(mode) ((mode) & STM32_I2S_MODE_RX)
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#define STM32_I2S_TX_ENABLED(mode) ((mode) & STM32_I2S_MODE_TX)
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/** @} */
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @name Configuration options
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* @{
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*/
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/**
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* @brief I2S1 driver enable switch.
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* @details If set to @p TRUE the support for I2S1 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(STM32_I2S_USE_SPI1) || defined(__DOXYGEN__)
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#define STM32_I2S_USE_SPI1 FALSE
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#endif
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/**
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* @brief I2S2 driver enable switch.
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* @details If set to @p TRUE the support for I2S2 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(STM32_I2S_USE_SPI2) || defined(__DOXYGEN__)
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#define STM32_I2S_USE_SPI2 FALSE
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#endif
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/**
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* @brief I2S3 driver enable switch.
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* @details If set to @p TRUE the support for I2S3 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(STM32_I2S_USE_SPI3) || defined(__DOXYGEN__)
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#define STM32_I2S_USE_SPI3 FALSE
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#endif
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/**
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* @brief I2S1 mode.
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*/
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#if !defined(STM32_I2S_SPI1_MODE) || defined(__DOXYGEN__)
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#define STM32_I2S_SPI1_MODE (STM32_I2S_MODE_MASTER | \
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STM32_I2S_MODE_RX)
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#endif
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/**
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* @brief I2S2 mode.
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*/
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#if !defined(STM32_I2S_SPI2_MODE) || defined(__DOXYGEN__)
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#define STM32_I2S_SPI2_MODE (STM32_I2S_MODE_MASTER | \
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STM32_I2S_MODE_RX)
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#endif
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/**
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* @brief I2S3 mode.
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*/
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#if !defined(STM32_I2S_SPI3_MODE) || defined(__DOXYGEN__)
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#define STM32_I2S_SPI3_MODE (STM32_I2S_MODE_MASTER | \
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STM32_I2S_MODE_RX)
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#endif
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/**
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* @brief I2S1 interrupt priority level setting.
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*/
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#if !defined(STM32_I2S_SPI1_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_I2S_SPI1_IRQ_PRIORITY 10
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#endif
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/**
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* @brief I2S2 interrupt priority level setting.
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*/
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#if !defined(STM32_I2S_SPI2_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_I2S_SPI2_IRQ_PRIORITY 10
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#endif
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/**
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* @brief I2S3 interrupt priority level setting.
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*/
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#if !defined(STM32_I2S_SPI3_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_I2S_SPI3_IRQ_PRIORITY 10
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#endif
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/**
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* @brief I2S1 DMA priority (0..3|lowest..highest).
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*/
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#if !defined(STM32_I2S_SPI1_DMA_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_I2S_SPI1_DMA_PRIORITY 1
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#endif
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/**
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* @brief I2S2 DMA priority (0..3|lowest..highest).
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*/
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#if !defined(STM32_I2S_SPI2_DMA_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_I2S_SPI2_DMA_PRIORITY 1
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#endif
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/**
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* @brief I2S3 DMA priority (0..3|lowest..highest).
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*/
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#if !defined(STM32_I2S_SPI3_DMA_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_I2S_SPI3_DMA_PRIORITY 1
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#endif
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/**
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* @brief I2S DMA error hook.
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*/
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#if !defined(STM32_I2S_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
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#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure")
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#endif
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/** @} */
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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#if STM32_I2S_USE_SPI1 && !STM32_SPI1_SUPPORTS_I2S
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#error "SPI1 does not support I2S mode"
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#endif
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#if STM32_I2S_USE_SPI2 && !STM32_SPI2_SUPPORTS_I2S
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#error "SPI2 does not support I2S mode"
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#endif
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#if STM32_I2S_USE_SPI3 && !STM32_SPI3_SUPPORTS_I2S
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#error "SPI3 does not support I2S mode"
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#endif
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#if STM32_I2S_RX_ENABLED(STM32_I2S_SPI1_MODE) && \
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STM32_I2S_TX_ENABLED(STM32_I2S_SPI1_MODE)
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#error "I2S1 RX and TX mode not supported in this driver implementation"
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#endif
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#if STM32_I2S_RX_ENABLED(STM32_I2S_SPI2_MODE) && \
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STM32_I2S_TX_ENABLED(STM32_I2S_SPI2_MODE)
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#error "I2S2 RX and TX mode not supported in this driver implementation"
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#endif
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#if STM32_I2S_RX_ENABLED(STM32_I2S_SPI3_MODE) && \
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STM32_I2S_TX_ENABLED(STM32_I2S_SPI3_MODE)
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#error "I2S3 RX and TX mode not supported in this driver implementation"
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#endif
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#if STM32_I2S_USE_SPI1 && !STM32_HAS_SPI1
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#error "SPI1 not present in the selected device"
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#endif
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#if STM32_I2S_USE_SPI2 && !STM32_HAS_SPI2
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#error "SPI2 not present in the selected device"
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#endif
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#if STM32_I2S_USE_SPI3 && !STM32_HAS_SPI3
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#error "SPI3 not present in the selected device"
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#endif
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#if !STM32_I2S_USE_SPI1 && !STM32_I2S_USE_SPI2 && !STM32_I2S_USE_SPI3
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#error "I2S driver activated but no SPI peripheral assigned"
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#endif
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#if STM32_I2S_USE_SPI1 && \
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!OSAL_IRQ_IS_VALID_PRIORITY(STM32_I2S_SPI1_IRQ_PRIORITY)
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#error "Invalid IRQ priority assigned to SPI1"
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#endif
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#if STM32_I2S_USE_SPI2 && \
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!OSAL_IRQ_IS_VALID_PRIORITY(STM32_I2S_SPI2_IRQ_PRIORITY)
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#error "Invalid IRQ priority assigned to SPI2"
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#endif
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#if STM32_I2S_USE_SPI3 && \
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!OSAL_IRQ_IS_VALID_PRIORITY(STM32_I2S_SPI3_IRQ_PRIORITY)
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#error "Invalid IRQ priority assigned to SPI3"
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#endif
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#if STM32_I2S_USE_SPI1 && \
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!STM32_DMA_IS_VALID_PRIORITY(STM32_I2S_SPI1_DMA_PRIORITY)
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#error "Invalid DMA priority assigned to SPI1"
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#endif
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#if STM32_I2S_USE_SPI2 && \
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!STM32_DMA_IS_VALID_PRIORITY(STM32_I2S_SPI2_DMA_PRIORITY)
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#error "Invalid DMA priority assigned to SPI2"
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#endif
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#if STM32_I2S_USE_SPI3 && \
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!STM32_DMA_IS_VALID_PRIORITY(STM32_I2S_SPI3_DMA_PRIORITY)
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#error "Invalid DMA priority assigned to SPI3"
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#endif
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/* The following checks are only required when there is a DMA able to
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reassign streams to different channels.*/
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#if STM32_ADVANCED_DMA
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/* Check on the presence of the DMA streams settings in mcuconf.h.*/
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#if STM32_I2S_USE_SPI1 && (!defined(STM32_I2S_SPI1_RX_DMA_STREAM) || \
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!defined(STM32_I2S_SPI1_TX_DMA_STREAM))
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#error "SPI1 DMA streams not defined"
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#endif
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#if STM32_I2S_USE_SPI2 && (!defined(STM32_I2S_SPI2_RX_DMA_STREAM) || \
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!defined(STM32_I2S_SPI2_TX_DMA_STREAM))
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#error "SPI2 DMA streams not defined"
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#endif
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#if STM32_I2S_USE_SPI3 && (!defined(STM32_I2S_SPI3_RX_DMA_STREAM) || \
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!defined(STM32_I2S_SPI3_TX_DMA_STREAM))
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#error "SPI3 DMA streams not defined"
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#endif
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/* Check on the validity of the assigned DMA channels.*/
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#if STM32_I2S_USE_SPI1 && \
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!STM32_DMA_IS_VALID_ID(STM32_I2S_SPI1_RX_DMA_STREAM, STM32_SPI1_RX_DMA_MSK)
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#error "invalid DMA stream associated to SPI1 RX"
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#endif
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#if STM32_I2S_USE_SPI1 && \
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!STM32_DMA_IS_VALID_ID(STM32_I2S_SPI1_TX_DMA_STREAM, STM32_SPI1_TX_DMA_MSK)
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#error "invalid DMA stream associated to SPI1 TX"
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#endif
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#if STM32_I2S_USE_SPI2 && \
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!STM32_DMA_IS_VALID_ID(STM32_I2S_SPI2_RX_DMA_STREAM, STM32_SPI2_RX_DMA_MSK)
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#error "invalid DMA stream associated to SPI2 RX"
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#endif
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#if STM32_I2S_USE_SPI2 && \
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!STM32_DMA_IS_VALID_ID(STM32_I2S_SPI2_TX_DMA_STREAM, STM32_SPI2_TX_DMA_MSK)
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#error "invalid DMA stream associated to SPI2 TX"
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#endif
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#if STM32_I2S_USE_SPI3 && \
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!STM32_DMA_IS_VALID_ID(STM32_I2S_SPI3_RX_DMA_STREAM, STM32_SPI3_RX_DMA_MSK)
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#error "invalid DMA stream associated to SPI3 RX"
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#endif
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#if STM32_I2S_USE_SPI3 && \
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!STM32_DMA_IS_VALID_ID(STM32_I2S_SPI3_TX_DMA_STREAM, STM32_SPI3_TX_DMA_MSK)
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#error "invalid DMA stream associated to SPI3 TX"
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#endif
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#endif /* STM32_ADVANCED_DMA */
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#if !defined(STM32_DMA_REQUIRED)
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#define STM32_DMA_REQUIRED
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#endif
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief Type of a structure representing an I2S driver.
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*/
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typedef struct I2SDriver I2SDriver;
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/**
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* @brief I2S notification callback type.
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*
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* @param[in] i2sp pointer to the @p I2SDriver object
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* @param[in] offset offset in buffers of the data to read/write
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* @param[in] n number of samples to read/write
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*/
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typedef void (*i2scallback_t)(I2SDriver *i2sp, size_t offset, size_t n);
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/**
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* @brief Driver configuration structure.
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* @note It could be empty on some architectures.
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*/
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typedef struct {
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/**
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* @brief Transmission buffer pointer.
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* @note Can be @p NULL if TX is not required.
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*/
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const void *tx_buffer;
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/**
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* @brief Receive buffer pointer.
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* @note Can be @p NULL if RX is not required.
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*/
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void *rx_buffer;
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/**
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* @brief TX and RX buffers size as number of samples.
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*/
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size_t size;
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/**
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* @brief Callback function called during streaming.
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*/
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i2scallback_t end_cb;
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/* End of the mandatory fields.*/
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/**
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* @brief Configuration of the I2SCFGR register.
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* @details See the STM32 reference manual, this register is used for
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* the I2S configuration, the following bits must not be
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* specified because handled directly by the driver:
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* - I2SMOD
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* - I2SE
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* - I2SCFG
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* .
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*/
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int16_t i2scfgr;
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/**
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* @brief Configuration of the I2SPR register.
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* @details See the STM32 reference manual, this register is used for
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* the I2S clock setup.
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*/
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int16_t i2spr;
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} I2SConfig;
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/**
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* @brief Structure representing an I2S driver.
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*/
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struct I2SDriver {
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/**
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* @brief Driver state.
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*/
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i2sstate_t state;
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/**
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* @brief Current configuration data.
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*/
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const I2SConfig *config;
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/* End of the mandatory fields.*/
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/**
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* @brief Pointer to the SPIx registers block.
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*/
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SPI_TypeDef *spi;
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/**
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* @brief Calculated part of the I2SCFGR register.
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*/
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uint16_t cfg;
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/**
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* @brief Receive DMA stream or @p NULL.
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*/
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const stm32_dma_stream_t *dmarx;
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/**
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* @brief Transmit DMA stream or @p NULL.
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*/
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const stm32_dma_stream_t *dmatx;
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/**
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* @brief RX DMA mode bit mask.
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*/
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uint32_t rxdmamode;
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/**
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* @brief TX DMA mode bit mask.
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*/
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uint32_t txdmamode;
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};
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#if STM32_I2S_USE_SPI1 && !defined(__DOXYGEN__)
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extern I2SDriver I2SD1;
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#endif
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#if STM32_I2S_USE_SPI2 && !defined(__DOXYGEN__)
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extern I2SDriver I2SD2;
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#endif
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#if STM32_I2S_USE_SPI3 && !defined(__DOXYGEN__)
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extern I2SDriver I2SD3;
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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void i2s_lld_init(void);
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void i2s_lld_start(I2SDriver *i2sp);
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void i2s_lld_stop(I2SDriver *i2sp);
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void i2s_lld_start_exchange(I2SDriver *i2sp);
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void i2s_lld_stop_exchange(I2SDriver *i2sp);
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#ifdef __cplusplus
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}
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#endif
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#endif /* HAL_USE_I2S */
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#endif /* HAL_I2S_LLD_H */
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/** @} */
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