425 lines
13 KiB
C
Executable File
425 lines
13 KiB
C
Executable File
/*
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ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file CANv1/hal_can_lld.h
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* @brief STM32 CAN subsystem low level driver header.
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*
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* @addtogroup CAN
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* @{
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*/
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#ifndef HAL_CAN_LLD_H
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#define HAL_CAN_LLD_H
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#if HAL_USE_CAN || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/*
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* The following macros from the ST header file are replaced with better
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* equivalents.
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*/
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#undef CAN_BTR_BRP
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#undef CAN_BTR_TS1
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#undef CAN_BTR_TS2
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#undef CAN_BTR_SJW
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/**
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* @brief This switch defines whether the driver implementation supports
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* a low power switch mode with automatic an wakeup feature.
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*/
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#define CAN_SUPPORTS_SLEEP TRUE
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/**
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* @brief This implementation supports three transmit mailboxes.
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*/
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#define CAN_TX_MAILBOXES 3
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/**
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* @brief This implementation supports two receive mailboxes.
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*/
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#define CAN_RX_MAILBOXES 2
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/**
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* @name CAN registers helper macros
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* @{
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*/
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#define CAN_BTR_BRP(n) (n) /**< @brief BRP field macro.*/
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#define CAN_BTR_TS1(n) ((n) << 16) /**< @brief TS1 field macro.*/
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#define CAN_BTR_TS2(n) ((n) << 20) /**< @brief TS2 field macro.*/
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#define CAN_BTR_SJW(n) ((n) << 24) /**< @brief SJW field macro.*/
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#define CAN_IDE_STD 0 /**< @brief Standard id. */
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#define CAN_IDE_EXT 1 /**< @brief Extended id. */
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#define CAN_RTR_DATA 0 /**< @brief Data frame. */
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#define CAN_RTR_REMOTE 1 /**< @brief Remote frame. */
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/** @} */
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @name Configuration options
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* @{
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*/
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/**
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* @brief CAN pedantic errors report.
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* @details Use of this option is IRQ-intensive.
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*/
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#if !defined(STM32_CAN_REPORT_ALL_ERRORS) || defined(__DOXYGEN__)
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#define STM32_CAN_REPORT_ALL_ERRORS FALSE
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#endif
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/**
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* @brief CAN1 driver enable switch.
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* @details If set to @p TRUE the support for CAN1 is included.
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*/
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#if !defined(STM32_CAN_USE_CAN1) || defined(__DOXYGEN__)
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#define STM32_CAN_USE_CAN1 FALSE
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#endif
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/**
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* @brief CAN2 driver enable switch.
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* @details If set to @p TRUE the support for CAN2 is included.
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*/
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#if !defined(STM32_CAN_USE_CAN2) || defined(__DOXYGEN__)
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#define STM32_CAN_USE_CAN2 FALSE
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#endif
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/**
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* @brief CAN3 driver enable switch.
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* @details If set to @p TRUE the support for CAN3 is included.
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*/
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#if !defined(STM32_CAN_USE_CAN3) || defined(__DOXYGEN__)
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#define STM32_CAN_USE_CAN3 FALSE
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#endif
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/**
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* @brief CAN1 interrupt priority level setting.
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*/
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#if !defined(STM32_CAN_CAN1_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_CAN_CAN1_IRQ_PRIORITY 11
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#endif
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/** @} */
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/**
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* @brief CAN2 interrupt priority level setting.
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*/
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#if !defined(STM32_CAN_CAN2_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_CAN_CAN2_IRQ_PRIORITY 11
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#endif
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/** @} */
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/**
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* @brief CAN3 interrupt priority level setting.
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*/
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#if !defined(STM32_CAN_CAN3_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_CAN_CAN3_IRQ_PRIORITY 11
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#endif
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/** @} */
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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#if !defined(STM32_HAS_CAN1)
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#error "STM32_HAS_CAN1 not defined in registry"
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#endif
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#if !defined(STM32_HAS_CAN2)
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#error "STM32_HAS_CAN2 not defined in registry"
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#endif
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#if !defined(STM32_HAS_CAN3)
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#error "STM32_HAS_CAN3 not defined in registry"
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#endif
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#if (STM32_HAS_CAN1 | STM32_HAS_CAN2) && !defined(STM32_CAN_MAX_FILTERS)
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#error "STM32_CAN_MAX_FILTERS not defined in registry"
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#endif
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#if STM32_HAS_CAN3 && !defined(STM32_CAN3_MAX_FILTERS)
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#error "STM32_CAN3_MAX_FILTERS not defined in registry"
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#endif
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#if STM32_CAN_USE_CAN1 && !STM32_HAS_CAN1
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#error "CAN1 not present in the selected device"
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#endif
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#if STM32_CAN_USE_CAN2 && !STM32_HAS_CAN2
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#error "CAN2 not present in the selected device"
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#endif
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#if STM32_CAN_USE_CAN3 && !STM32_HAS_CAN3
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#error "CAN2 not present in the selected device"
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#endif
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#if !STM32_CAN_USE_CAN1 && !STM32_CAN_USE_CAN2 && !STM32_CAN_USE_CAN3
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#error "CAN driver activated but no CAN peripheral assigned"
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#endif
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#if !STM32_CAN_USE_CAN1 && STM32_CAN_USE_CAN2
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#error "CAN2 requires CAN1, it cannot operate independently"
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#endif
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#if CAN_USE_SLEEP_MODE && !CAN_SUPPORTS_SLEEP
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#error "CAN sleep mode not supported in this architecture"
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#endif
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief Type of a transmission mailbox index.
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*/
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typedef uint32_t canmbx_t;
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/**
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* @brief CAN transmission frame.
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* @note Accessing the frame data as word16 or word32 is not portable because
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* machine data endianness, it can be still useful for a quick filling.
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*/
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typedef struct {
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struct {
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uint8_t DLC:4; /**< @brief Data length. */
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uint8_t RTR:1; /**< @brief Frame type. */
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uint8_t IDE:1; /**< @brief Identifier type. */
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};
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union {
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struct {
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uint32_t SID:11; /**< @brief Standard identifier.*/
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};
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struct {
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uint32_t EID:29; /**< @brief Extended identifier.*/
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};
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};
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union {
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uint8_t data8[8]; /**< @brief Frame data. */
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uint16_t data16[4]; /**< @brief Frame data. */
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uint32_t data32[2]; /**< @brief Frame data. */
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uint64_t data64[1]; /**< @brief Frame data. */
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};
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} CANTxFrame;
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/**
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* @brief CAN received frame.
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* @note Accessing the frame data as word16 or word32 is not portable because
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* machine data endianness, it can be still useful for a quick filling.
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*/
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typedef struct {
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struct {
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uint8_t FMI; /**< @brief Filter id. */
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uint16_t TIME; /**< @brief Time stamp. */
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};
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struct {
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uint8_t DLC:4; /**< @brief Data length. */
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uint8_t RTR:1; /**< @brief Frame type. */
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uint8_t IDE:1; /**< @brief Identifier type. */
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};
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union {
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struct {
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uint32_t SID:11; /**< @brief Standard identifier.*/
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};
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struct {
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uint32_t EID:29; /**< @brief Extended identifier.*/
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};
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};
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union {
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uint8_t data8[8]; /**< @brief Frame data. */
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uint16_t data16[4]; /**< @brief Frame data. */
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uint32_t data32[2]; /**< @brief Frame data. */
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uint64_t data64[1]; /**< @brief Frame data. */
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};
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} CANRxFrame;
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/**
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* @brief CAN filter.
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* @note Refer to the STM32 reference manual for info about filters.
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*/
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typedef struct {
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/**
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* @brief Number of the filter to be programmed.
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*/
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uint32_t filter;
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/**
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* @brief Filter mode.
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* @note This bit represent the CAN_FM1R register bit associated to this
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* filter (0=mask mode, 1=list mode).
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*/
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uint32_t mode:1;
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/**
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* @brief Filter scale.
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* @note This bit represent the CAN_FS1R register bit associated to this
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* filter (0=16 bits mode, 1=32 bits mode).
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*/
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uint32_t scale:1;
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/**
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* @brief Filter mode.
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* @note This bit represent the CAN_FFA1R register bit associated to this
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* filter, must be set to zero in this version of the driver.
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*/
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uint32_t assignment:1;
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/**
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* @brief Filter register 1 (identifier).
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*/
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uint32_t register1;
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/**
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* @brief Filter register 2 (mask/identifier depending on mode=0/1).
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*/
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uint32_t register2;
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} CANFilter;
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/**
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* @brief Driver configuration structure.
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*/
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typedef struct {
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/**
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* @brief CAN MCR register initialization data.
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* @note Some bits in this register are enforced by the driver regardless
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* their status in this field.
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*/
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uint32_t mcr;
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/**
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* @brief CAN BTR register initialization data.
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* @note Some bits in this register are enforced by the driver regardless
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* their status in this field.
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*/
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uint32_t btr;
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} CANConfig;
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/**
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* @brief Structure representing an CAN driver.
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*/
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typedef struct {
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/**
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* @brief Driver state.
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*/
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canstate_t state;
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/**
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* @brief Current configuration data.
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*/
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const CANConfig *config;
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/**
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* @brief Transmission threads queue.
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*/
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threads_queue_t txqueue;
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/**
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* @brief Receive threads queue.
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*/
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threads_queue_t rxqueue;
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/**
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* @brief One or more frames become available.
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* @note After broadcasting this event it will not be broadcasted again
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* until the received frames queue has been completely emptied. It
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* is <b>not</b> broadcasted for each received frame. It is
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* responsibility of the application to empty the queue by
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* repeatedly invoking @p canReceive() when listening to this event.
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* This behavior minimizes the interrupt served by the system
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* because CAN traffic.
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* @note The flags associated to the listeners will indicate which
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* receive mailboxes become non-empty.
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*/
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event_source_t rxfull_event;
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/**
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* @brief One or more transmission mailbox become available.
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* @note The flags associated to the listeners will indicate which
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* transmit mailboxes become empty.
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* @note The upper 16 bits are transmission error flags associated
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* to the transmit mailboxes.
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*
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*/
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event_source_t txempty_event;
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/**
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* @brief A CAN bus error happened.
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* @note The flags associated to the listeners will indicate that
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* receive error(s) have occurred.
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* @note In this implementation the upper 16 bits are filled with the
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* unprocessed content of the ESR register.
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*/
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event_source_t error_event;
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#if CAN_USE_SLEEP_MODE || defined (__DOXYGEN__)
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/**
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* @brief Entering sleep state event.
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*/
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event_source_t sleep_event;
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/**
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* @brief Exiting sleep state event.
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*/
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event_source_t wakeup_event;
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#endif /* CAN_USE_SLEEP_MODE */
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/* End of the mandatory fields.*/
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/**
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* @brief Pointer to the CAN registers.
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*/
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CAN_TypeDef *can;
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} CANDriver;
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#if STM32_CAN_USE_CAN1 && !defined(__DOXYGEN__)
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extern CANDriver CAND1;
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#endif
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#if STM32_CAN_USE_CAN2 && !defined(__DOXYGEN__)
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extern CANDriver CAND2;
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#endif
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#if STM32_CAN_USE_CAN3 && !defined(__DOXYGEN__)
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extern CANDriver CAND3;
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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void can_lld_init(void);
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void can_lld_start(CANDriver *canp);
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void can_lld_stop(CANDriver *canp);
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bool can_lld_is_tx_empty(CANDriver *canp, canmbx_t mailbox);
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void can_lld_transmit(CANDriver *canp,
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canmbx_t mailbox,
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const CANTxFrame *crfp);
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bool can_lld_is_rx_nonempty(CANDriver *canp, canmbx_t mailbox);
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void can_lld_receive(CANDriver *canp,
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canmbx_t mailbox,
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CANRxFrame *ctfp);
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#if CAN_USE_SLEEP_MODE
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void can_lld_sleep(CANDriver *canp);
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void can_lld_wakeup(CANDriver *canp);
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#endif /* CAN_USE_SLEEP_MODE */
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void canSTM32SetFilters(CANDriver *canp, uint32_t can2sb,
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uint32_t num, const CANFilter *cfp);
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#ifdef __cplusplus
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}
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#endif
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#endif /* HAL_USE_CAN */
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#endif /* HAL_CAN_LLD_H */
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/** @} */
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