146 lines
3.8 KiB
C
146 lines
3.8 KiB
C
#include <basic/basic.h>
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#include <nrf24l01p.h>
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#include "core/ssp/ssp.h"
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#define CHANNEL_BEACON 81
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#define DEFAULT_SPEED R_RF_SETUP_DR_2M
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#define MAC_BEACON "BEACO"
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/*-----------------------------------------------------------------------*/
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/* Transmit a byte via SPI (Platform dependent) */
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/*-----------------------------------------------------------------------*/
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void xmit_spi(uint8_t dat) {
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sspSend(0, (uint8_t*) &dat, 1);
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}
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/*-----------------------------------------------------------------------*/
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/* Receive a byte from MMC via SPI (Platform dependent) */
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/*-----------------------------------------------------------------------*/
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uint8_t rcvr_spi (void) {
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uint8_t data = 0;
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sspReceive(0, &data, 1);
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return data;
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}
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#define rcvr_spi_m(dst) \
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do { \
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sspReceive(0, (uint8_t*)(dst), 1); \
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} while(0)
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#define CS_LOW() gpioSetValue(RB_SPI_NRF_CS, 0)
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#define CS_HIGH() gpioSetValue(RB_SPI_NRF_CS, 1)
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#define CE_LOW() gpioSetValue(RB_NRF_CE, 0)
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#define CE_HIGH() gpioSetValue(RB_NRF_CE, 1)
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void nrf_cmd(uint8_t cmd){
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xmit_spi(cmd);
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};
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uint8_t nrf_cmd_status(uint8_t cmd){
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xmit_spi(cmd);
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return rcvr_spi();
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};
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void nrf_write_reg(const uint8_t reg, const uint8_t val){
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xmit_spi(C_W_REGISTER | reg);
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xmit_spi(val);
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};
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/*
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uint8_t nrf_read_reg(const uint8_t reg, uint8_t val){
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xmit_spi(C_R_REGISTER | reg);
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// do i need to read the status byte here?
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xmit_spi(val);
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return rcvr_spi();
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};
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*/
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void nrf_write_reg_long(const uint8_t reg, int len, char* data){
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xmit_spi(C_W_REGISTER | reg);
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for(int i=0;i<len;i++){
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xmit_spi(data[i]);
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};
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};
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void nrf_cmd_read_long(const uint8_t cmd, int *len, char* data){
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xmit_spi(cmd);
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// do i need to read the status byte here?
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for(int i=0;i<*len;i++){
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xmit_spi(0);
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rcvr_spi_m(&data[i]);
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};
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};
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void nrf_init() {
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// Enable SPI correctly
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sspInit(0, sspClockPolarity_Low, sspClockPhase_RisingEdge);
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// Enable CS & CE pins
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gpioSetDir(RB_SPI_NRF_CS, gpioDirection_Output);
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gpioSetPullup(&RB_SPI_NRF_CS_IO, gpioPullupMode_Inactive);
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gpioSetDir(RB_NRF_CE, gpioDirection_Output);
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gpioSetPullup(&RB_NRF_CE_IO, gpioPullupMode_PullUp);
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// Setup for nrf24l01+
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// power up takes 1.5ms - 3.5ms (depending on crystal)
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CS_LOW();
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nrf_write_reg(R_CONFIG,
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R_CONFIG_PRIM_RX| // Receive mode
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R_CONFIG_PWR_UP| // Power on
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R_CONFIG_CRCO // 2-byte CRC
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);
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nrf_write_reg(R_EN_AA, 0); // Disable Enhanced ShockBurst;
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nrf_write_reg(R_RF_CH, CHANNEL_BEACON &127); // Select channel
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// enable receive pipes
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nrf_write_reg(R_EN_RXADDR,R_EN_RXADDR_ERX_P0
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// |R_EN_RXADDR_ERX_P1
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);
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nrf_write_reg(R_RX_PW_P0,16);
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nrf_write_reg_long(R_RX_ADDR_P0,5,"\x1\x2\x3\x2\1");
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// nrf_write_reg(R_RX_PW_P1,16);
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// nrf_write_reg_long(R_RX_ADDR_P1,5,"R0KET");
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// OpenBeacon transmit address
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nrf_write_reg_long(R_TX_ADDR,5,MAC_BEACON);
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// Set speed / strength
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nrf_write_reg(R_RF_SETUP,DEFAULT_SPEED|R_RF_SETUP_RF_PWR_3);
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// XXX: or write R_CONFIG last?
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CS_HIGH();
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};
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int nrf_rcv_pkt_time(int maxtime, int maxsize, char * pkt){
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char buf;
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int len;
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CS_LOW();
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nrf_write_reg(R_CONFIG,
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R_CONFIG_PRIM_RX| // Receive mode
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R_CONFIG_PWR_UP| // Power on
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R_CONFIG_CRCO // 2-byte CRC
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);
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CE_HIGH();
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delayms(maxtime); // XXX: check interrupt?
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CE_LOW();
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len=1;
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nrf_cmd_read_long(C_R_RX_PL_WID,&len,&buf);
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len=buf;
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if(len>32 || len==0){
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return 0; // no packet
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};
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if(len>maxsize){
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return -1; // packet too large
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};
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nrf_cmd_read_long(C_R_RX_PAYLOAD,&len,pkt);
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CS_HIGH();
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return len;
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};
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