2011-05-15 11:27:49 +00:00
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/**************************************************************************/
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/*!
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@file timer16.c
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@author K. Townsend (microBuilder.eu)
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@section DESCRIPTION
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Generic code for both 16-bit timers.
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@warning 16-bit timers are limited to roughly ~0.91ms (or 910uS) on
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a system running at 72MHz since:
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@code
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1 mS = CFG_CPU_CCLK / 1000
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= 72000000 / 1000
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= 72000 'ticks'
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@endcode
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Meaning that 0xFFFF (65535) 'ticks' = 0.910208 milliseconds
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or 910 microseconds.
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@section Example
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@code
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#include "/core/cpu/cpu.h"
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#include "/core/timer16/timer16.h"
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// Instantiated in timer16.h
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extern volatile uint32_t timer16_0_counter;
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...
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cpuInit();
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// Initialise timer0 with a delay of 0xFFFF, which will cause the
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// timer interrupt to fire every 65535 ticks and increment
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// timer16_0_counter by 1
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timer16Init(0, 0xFFFF);
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// Enable the timer
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timer16Enable(0);
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// At this point timer16_0_counter should start incrementing by 1
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// every 65535 ticks
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@endcode
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@section LICENSE
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Software License Agreement (BSD License)
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Copyright (c) 2010, microBuilder SARL
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the copyright holders nor the
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names of its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
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EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
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DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**************************************************************************/
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#include "timer16.h"
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volatile uint32_t timer16_0_counter = 0;
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volatile uint32_t timer16_1_counter = 0;
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#ifdef CFG_PWM
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volatile uint32_t pwmCounter = 0;
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extern volatile uint32_t pwmMaxPulses; // See drivers/pwm/pwm.c
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#endif
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/**************************************************************************/
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/*!
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@brief Causes a blocking delay for the specified number of
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clock ticks.
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@note The exact duration of this delay depends on the speed of the
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system clock, but it will invariably be short because of the
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16-bit limitation. For example, on a system with a 72MHz
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clock, a 1mS delay would be equal to 72,000 ticks, which is
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already above the maximum 16-bit value of 65,535. Thus, the
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maximum delay measured in mS with a 72MHz clock is ~0.91mS.
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@param[in] timerNum
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The 16-bit timer to user (0..1)
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@param[in] delayInTicks
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The number of clock ticks to delay (0..65534)
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@section Example
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@code
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#include "/core/cpu/cpu.h"
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#include "/core/timer16/timer16.h"
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int main(void)
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{
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cpuInit();
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// Initialise timer 0 ... delay is provided but not used here
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timer16Init(0, 0xFFFF);
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// Enable the timer
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timer16Enable(0);
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while(1)
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{
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// Cause blocking delay for 36000 ticks (0.5mS @ 72MHz)
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// Note: The delay must be 65534 or less (16-bit value)
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timer16DelayTicks(0, 36000);
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}
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}
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@endcode
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*/
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/**************************************************************************/
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void timer16DelayTicks(uint8_t timerNum, uint16_t delayInTicks)
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{
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// ToDo: Verify incoming value
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if (timerNum == 0)
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{
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/* Reset the timer */
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TMR_TMR16B0TCR = TMR_TMR16B0TCR_COUNTERRESET_ENABLED;
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/* Set the prescaler to zero */
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TMR_TMR16B0PR = 0x00;
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TMR_TMR16B0MR0 = delayInTicks;
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/* Reset all interrupts */
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TMR_TMR16B0IR = TMR_TMR16B0IR_MASK_ALL;
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/* Stop timer on match (MR0) */
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TMR_TMR16B0MCR = TMR_TMR16B0MCR_MR0_STOP_ENABLED;
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/* Start timer */
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TMR_TMR16B0TCR = TMR_TMR16B0TCR_COUNTERENABLE_ENABLED;
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/* Wait until the delay time has elapsed */
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while (TMR_TMR16B0TCR & TMR_TMR16B0TCR_COUNTERENABLE_ENABLED);
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}
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else if (timerNum == 1)
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{
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/* Reset the timer */
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TMR_TMR16B1TCR = TMR_TMR16B1TCR_COUNTERRESET_ENABLED;
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/* Set the prescaler to zero */
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TMR_TMR16B1PR = 0x00;
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TMR_TMR16B1MR0 = delayInTicks;
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/* Reset all interrupts */
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TMR_TMR16B1IR = TMR_TMR16B1IR_MASK_ALL;
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/* Stop timer on match (MR0) */
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TMR_TMR16B1MCR = TMR_TMR16B1MCR_MR0_STOP_ENABLED;
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/* Start timer */
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TMR_TMR16B1TCR = TMR_TMR16B1TCR_COUNTERENABLE_ENABLED;
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/* Wait until the delay time has elapsed */
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while (TMR_TMR16B1TCR & TMR_TMR16B1TCR_COUNTERENABLE_ENABLED);
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}
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return;
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}
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/**************************************************************************/
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/*!
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@brief Causes a blocking delay for the specified number of
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microseconds
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@warning The maximum delay in uS will depend on the clock speed,
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but running at 72MHz the maximum delay (MR = 0xFFFF)
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would be 910uS (0xFFFF / 72 = 910), or 0.91 milliseconds.
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@param[in] timerNum
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The 16-bit timer to user (0..1)
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@param[in] delayInUs
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The number of microseconds to wait
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@section Example
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@code
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#include "/core/cpu/cpu.h"
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#include "/core/timer16/timer16.h"
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int main(void)
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{
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cpuInit();
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// Initialise timer 0 ... delay is provided but not used here
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timer16Init(0, 0xFFFF);
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// Enable the timer
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timer16Enable(0);
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while(1)
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{
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// Cause blocking delay for 500 microseconds (0.5mS)
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timer16DelayUS(0, 500);
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}
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}
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@endcode
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*/
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/**************************************************************************/
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void timer16DelayUS(uint8_t timerNum, uint16_t delayInUS)
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{
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// ToDo: Check if the appropriate timer is enabled first?
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if (timerNum == 0)
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{
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/* Reset the timer */
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TMR_TMR16B0TCR = TMR_TMR16B0TCR_COUNTERRESET_ENABLED;
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/* Set the prescaler to zero */
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TMR_TMR16B0PR = 0x00;
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TMR_TMR16B0MR0 = delayInUS * ((CFG_CPU_CCLK/SCB_SYSAHBCLKDIV)/1000000);
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/* Reset all interrupts */
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TMR_TMR16B0IR = TMR_TMR16B0IR_MASK_ALL;
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/* Stop timer on match (MR0) */
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TMR_TMR16B0MCR = TMR_TMR16B0MCR_MR0_STOP_ENABLED;
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/* Start timer */
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TMR_TMR16B0TCR = TMR_TMR16B0TCR_COUNTERENABLE_ENABLED;
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/* Wait until the delay time has elapsed */
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while (TMR_TMR16B0TCR & TMR_TMR16B0TCR_COUNTERENABLE_ENABLED);
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}
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else if (timerNum == 1)
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{
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/* Reset the timer */
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TMR_TMR16B1TCR = TMR_TMR16B1TCR_COUNTERRESET_ENABLED;
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/* Set the prescaler to zero */
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TMR_TMR16B1PR = 0x00;
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TMR_TMR16B1MR0 = delayInUS * ((CFG_CPU_CCLK/SCB_SYSAHBCLKDIV)/1000000);
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/* Reset all interrupts */
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TMR_TMR16B1IR = TMR_TMR16B1IR_MASK_ALL;
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/* Stop timer on match (MR0) */
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TMR_TMR16B1MCR = TMR_TMR16B1MCR_MR0_STOP_ENABLED;
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/* Start timer */
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TMR_TMR16B1TCR = TMR_TMR16B1TCR_COUNTERENABLE_ENABLED;
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/* Wait until the delay time has elapsed */
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while (TMR_TMR16B1TCR & TMR_TMR16B1TCR_COUNTERENABLE_ENABLED);
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}
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return;
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}
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/**************************************************************************/
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/*!
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@brief Interrupt handler for 16-bit timer 0
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*/
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/**************************************************************************/
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void TIMER16_0_IRQHandler(void)
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{
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/* Clear the interrupt flag */
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TMR_TMR16B0IR = TMR_TMR16B0IR_MR0;
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/* Increment timer counter by 1 (it will automatically roll back to 0) */
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timer16_0_counter++;
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return;
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}
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/**************************************************************************/
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/*!
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@brief Interrupt handler for 16-bit timer 1
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*/
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/**************************************************************************/
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void TIMER16_1_IRQHandler(void)
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{
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/* Clear the interrupt flag */
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TMR_TMR16B1IR = TMR_TMR16B1IR_MR0;
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/* Increment timer counter by 1 (it will automatically roll back to 0) */
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timer16_1_counter++;
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#ifdef CFG_PWM
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/* Check if the PWM output should be disabled after pwmMaxPulses pulses */
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/* See "drivers/pwm/pwm.c" */
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if (TMR_TMR16B1IR & TMR_TMR16B1IR_MR3)
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{
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/* Clear the interrupt flag */
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TMR_TMR16B1IR = TMR_TMR16B1IR_MR3;
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if (pwmMaxPulses > 0)
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{
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pwmCounter++;
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if (pwmCounter == pwmMaxPulses)
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{
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/* Disable interrupt on MR3 */
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TMR_TMR16B1MCR &= ~(TMR_TMR16B1MCR_MR3_INT_MASK);
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/* Disable Timer */
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TMR_TMR16B1TCR &= ~(TMR_TMR16B1TCR_COUNTERENABLE_MASK);
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/* Reset the counter variables */
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pwmCounter = 0;
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pwmMaxPulses = 0;
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}
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}
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}
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#endif
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return;
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}
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/**************************************************************************/
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/*!
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@brief Enables the specified timer
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@param[in] timerNum
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The 16-bit timer to enable (0..1)
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*/
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/**************************************************************************/
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void timer16Enable(uint8_t timerNum)
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{
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if ( timerNum == 0 )
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{
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TMR_TMR16B0TCR = TMR_TMR16B0TCR_COUNTERENABLE_ENABLED;
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}
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else if (timerNum == 1)
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{
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TMR_TMR16B1TCR = TMR_TMR16B1TCR_COUNTERENABLE_ENABLED;
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}
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return;
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}
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/**************************************************************************/
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/*!
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@brief Disables the specified timer
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@param[in] timerNum
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The 16-bit timer to disable (0..1)
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*/
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/**************************************************************************/
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void timer16Disable(uint8_t timerNum)
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{
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if ( timerNum == 0 )
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{
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TMR_TMR16B0TCR = TMR_TMR16B0TCR_COUNTERENABLE_DISABLED;
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}
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else if (timerNum == 1)
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{
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TMR_TMR16B1TCR = TMR_TMR16B1TCR_COUNTERENABLE_DISABLED;
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}
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return;
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}
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/**************************************************************************/
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/*!
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@brief Resets the specified timer
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@param[in] timerNum
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The 16-bit timer to reset (0..1)
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*/
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/**************************************************************************/
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void timer16Reset(uint8_t timerNum)
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{
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uint32_t regVal;
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if ( timerNum == 0 )
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{
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|
regVal = TMR_TMR16B0TCR;
|
|
|
|
regVal |= TMR_TMR16B0TCR_COUNTERRESET_ENABLED;
|
|
|
|
TMR_TMR16B0TCR = regVal;
|
|
|
|
}
|
|
|
|
|
|
|
|
else if (timerNum == 1)
|
|
|
|
{
|
|
|
|
regVal = TMR_TMR16B1TCR;
|
|
|
|
regVal |= TMR_TMR16B1TCR_COUNTERRESET_ENABLED;
|
|
|
|
TMR_TMR16B1TCR = regVal;
|
|
|
|
}
|
|
|
|
|
|
|
|
return;
|
|
|
|
}
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|
|
|
|
|
|
|
/**************************************************************************/
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|
|
/*!
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|
|
@brief Initialises the specified 16-bit timer, sets the timer
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|
|
interval, resets the timer, and configures the interrupt
|
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|
|
handler.
|
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|
|
|
|
|
|
Initialises a 16-bit timer with the supplied timer interval (the
|
|
|
|
amount of time that passes between each timer 'tick'). Every time that
|
|
|
|
this interval elapses, the timer's interrupt will be fired and the
|
|
|
|
appropriate counter variable will be incremented by one (For example,
|
|
|
|
with CT16B0, 'timer16_0_counter' would be incremented).
|
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|
|
|
|
|
|
@param[in] timerNum
|
|
|
|
The 16-bit timer to initiliase (0..1)
|
|
|
|
@param[in] timerInterval
|
|
|
|
The number of clock 'ticks' between resets (0..65534)
|
|
|
|
|
|
|
|
@warning Care needs to be taken when configuring the timers since
|
|
|
|
the pins are all multiplexed with other peripherals. This
|
|
|
|
code is provided as a starting point, but it will need to
|
|
|
|
be adjusted according to your own situation and
|
|
|
|
pin/peripheral requirements
|
|
|
|
*/
|
|
|
|
/**************************************************************************/
|
|
|
|
void timer16Init(uint8_t timerNum, uint16_t timerInterval)
|
|
|
|
{
|
|
|
|
// If timerInterval is invalid, use the default value
|
|
|
|
if (timerInterval < 1)
|
|
|
|
{
|
|
|
|
timerInterval = TIMER16_DEFAULTINTERVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if ( timerNum == 0 )
|
|
|
|
{
|
|
|
|
/* Enable the clock for CT16B0 */
|
|
|
|
SCB_SYSAHBCLKCTRL |= (SCB_SYSAHBCLKCTRL_CT16B0);
|
|
|
|
|
|
|
|
/* The physical pins associated with CT16B0 are not enabled by
|
|
|
|
default in order to avoid conflicts with other peripherals.
|
|
|
|
Pin 0.10 (CT16B0_MAT2), for example, can not be used while
|
|
|
|
debugging with a hardware debugger. If you require one or
|
|
|
|
more of these pins, simply uncomment the code below */
|
|
|
|
|
|
|
|
/* Configure PIO0.2 as Timer0_16 CAP0 */
|
|
|
|
// IOCON_PIO0_2 &= ~IOCON_PIO0_2_FUNC_MASK;
|
|
|
|
// IOCON_PIO0_2 |= IOCON_PIO0_2_FUNC_CT16B0_CAP0;
|
|
|
|
|
|
|
|
/* Configure PIO0.8 as Timer0_16 MAT0 */
|
|
|
|
// IOCON_PIO0_8 &= ~IOCON_PIO0_8_FUNC_MASK;
|
|
|
|
// IOCON_PIO0_8 |= IOCON_PIO0_8_FUNC_CT16B0_MAT0;
|
|
|
|
|
|
|
|
/* Configure PIO0.9 as Timer0_16 MAT1 */
|
|
|
|
// IOCON_PIO0_9 &= ~IOCON_PIO0_9_FUNC_MASK;
|
|
|
|
// IOCON_PIO0_9 |= IOCON_PIO0_9_FUNC_CT16B0_MAT1;
|
|
|
|
|
|
|
|
/* Configure PIO0.10 as Timer0_16 MAT3 */
|
|
|
|
// IOCON_JTAG_TCK_PIO0_10 &= ~IOCON_JTAG_TCK_PIO0_10_FUNC_MASK;
|
|
|
|
// IOCON_JTAG_TCK_PIO0_10 |= IOCON_JTAG_TCK_PIO0_10_FUNC_CT16B0_MAT2;
|
|
|
|
|
|
|
|
timer16_0_counter = 0;
|
|
|
|
TMR_TMR16B0MR0 = timerInterval;
|
|
|
|
|
|
|
|
/* Configure match control register to raise an interrupt and reset on MR0 */
|
|
|
|
TMR_TMR16B0MCR = (TMR_TMR16B0MCR_MR0_INT_ENABLED | TMR_TMR16B0MCR_MR0_RESET_ENABLED);
|
|
|
|
|
|
|
|
/* Enable the TIMER0 interrupt */
|
|
|
|
NVIC_EnableIRQ(TIMER_16_0_IRQn);
|
|
|
|
}
|
|
|
|
|
|
|
|
else if ( timerNum == 1 )
|
|
|
|
{
|
|
|
|
/* Enable the clock for CT16B1 */
|
|
|
|
SCB_SYSAHBCLKCTRL |= (SCB_SYSAHBCLKCTRL_CT16B1);
|
|
|
|
|
|
|
|
/* The physical pins associated with CT16B0 are not enabled by
|
|
|
|
default in order to avoid conflicts with other peripherals.
|
|
|
|
Pin 0.10 (CT16B0_MAT2), for example, can not be used while
|
|
|
|
debugging with a hardware debugger. If you require one or
|
|
|
|
more of these pins, simply uncomment the code below */
|
|
|
|
|
|
|
|
/* Configure PIO1.8 as Timer1_16 CAP0 */
|
|
|
|
// IOCON_PIO1_8 &= ~IOCON_PIO1_8_FUNC_MASK;
|
|
|
|
// IOCON_PIO1_8 |= IOCON_PIO1_8_FUNC_CT16B1_CAP0;
|
|
|
|
|
|
|
|
/* Configure PIO1.9 as Timer1_16 MAT0 */
|
|
|
|
// IOCON_PIO1_9 &= ~IOCON_PIO1_9_FUNC_MASK;
|
|
|
|
// IOCON_PIO1_9 |= IOCON_PIO1_9_FUNC_CT16B1_MAT0;
|
|
|
|
|
|
|
|
/* Configure PIO1.10 as Timer1_16 MAT1 */
|
|
|
|
// IOCON_PIO1_10 &= ~IOCON_PIO1_10_FUNC_MASK;
|
|
|
|
// IOCON_PIO1_10 |= IOCON_PIO1_10_FUNC_CT16B1_MAT1;
|
|
|
|
|
|
|
|
timer16_1_counter = 0;
|
|
|
|
TMR_TMR16B1MR0 = timerInterval;
|
|
|
|
|
|
|
|
/* Configure match control register to raise an interrupt and reset on MR0 */
|
|
|
|
TMR_TMR16B1MCR = (TMR_TMR16B1MCR_MR0_INT_ENABLED | TMR_TMR16B1MCR_MR0_RESET_ENABLED);
|
|
|
|
|
|
|
|
/* Enable the TIMER1 Interrupt */
|
|
|
|
NVIC_EnableIRQ(TIMER_16_1_IRQn);
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
}
|