diff --git a/borg_hw/borg_hw_pd1165_test.c b/borg_hw/borg_hw_pd1165.c
similarity index 95%
rename from borg_hw/borg_hw_pd1165_test.c
rename to borg_hw/borg_hw_pd1165.c
index db1964f..235db4f 100644
--- a/borg_hw/borg_hw_pd1165_test.c
+++ b/borg_hw/borg_hw_pd1165.c
@@ -32,21 +32,23 @@
 //#define COLDDR2  DDR(COLPORT2)
 //#define ROWDDR   DDR(ROWPORT)
 
-#define DATAPORT PORTC
+//#define DATAPORT PORTC
 #define DATADDR  DDR(DATAPORT)
 
-#define ADDRPORT PORTA
+//#define ADDRPORT PORTA
 #define ADDRDDR  DDR(ADDRPORT)
 
-#define CTRLPORT PORTD
+//#define CTRLPORT PORTD
 #define CTRLDDR  DDR(CTRLPORT)
 
-#define BIT_CS0 2
-#define BIT_CS1 3
-#define BIT_CS2 4
-#define BIT_CS3 5
+#define RDIMDDR DDR(RDIMPORT)
 
-#define BIT_RW 6
+//#define BIT_CS0 2
+//#define BIT_CS1 3
+//#define BIT_CS2 4
+//#define BIT_CS3 5
+
+//#define BIT_RW 6
 
 //Der Puffer, in dem das aktuelle Bild gespeichert wird
 unsigned char pixmap[NUMPLANE][NUM_ROWS][LINEBYTES];
@@ -195,10 +197,7 @@ SIGNAL(SIG_OUTPUT_COMPARE0)
 void timer0_off(){
 	cli();
 
-	COLPORT1 = 0;
-	COLPORT2 = 0;
-	ROWPORT = 0;
-
+	
 	TCCR0 = 0x00;
 	sei();
 }
@@ -268,12 +267,9 @@ void borg_hw_init(){
 	
 	DDRD |= 1<<PD7; //OC2 pin to output
 	
-	PORTA |= (1<<PA4);
-	DDRA  |= (1<<PA4);
+	RDIMPORT |= (1<<BIT_RDIM);
+	RDIMDDR  |= (1<<BIT_RDIM);
 	
-	
-	PORTD |= (1<<PD7);
-
 	//Watchdog Timer aktivieren
 	wdt_reset();
 	wdt_enable(0x00);	// 17ms Watchdog
diff --git a/borg_hw/config_pd1165_test.in b/borg_hw/config_pd1165.in
similarity index 52%
rename from borg_hw/config_pd1165_test.in
rename to borg_hw/config_pd1165.in
index 5ae4ee0..667c5cf 100644
--- a/borg_hw/config_pd1165_test.in
+++ b/borg_hw/config_pd1165.in
@@ -1,5 +1,5 @@
 mainmenu_option next_comment
-comment "Borg16 port setup"
+comment "PD1165 Port Setup"
 
 #define COLPORT1  PORTC
 #define COLDDR1   DDRC
@@ -18,30 +18,37 @@ comment "Borg16 port setup"
 #define PIN_SHFT1 PD7
 
 
-choice 'Column Port 1 (right)'			\
+choice 'Data Port'			\
    "PORTA  PORTA \
     PORTB  PORTB \
     PORTC  PORTC \
     PORTD  PORTD" \
-   'PORTC' COLPORT1 
+   'PORTC' DATAPORT 
 
-choice 'Column Port 2 (left)'			\
+choice 'Address Port (Bits0-3)'			\
    "PORTA  PORTA \
     PORTB  PORTB \
     PORTC  PORTC \
     PORTD  PORTD" \
-   'PORTA' COLPORT2 
+   'PORTA' ADDRPORT 
 
-choice 'port for row shiftregisters'			\
+choice 'Control Port'			\
    "PORTA  PORTA \
     PORTB  PORTB \
     PORTC  PORTC \
     PORTD  PORTD" \
-   'PORTD' ROWPORT
+   'PORTD' CTRLPORT
 
-comment "pin numbers on shiftregister port"
+choice 'Rdim Port'			\
+   "PORTA  PORTA \
+    PORTB  PORTB \
+    PORTC  PORTC \
+    PORTD  PORTD" \
+   'PORTA' RDIMPORT
 
-choice '/MCLR Pin'			\
+comment "pin numbers on Control Port"
+
+choice 'CS0 Pin'			\
    "Pin0 0 \
     Pin1 1 \
     Pin2 2 \
@@ -50,9 +57,9 @@ choice '/MCLR Pin'			\
     Pin5 5 \
     Pin6 6 \
     Pin7 7" \
-   'Pin4' PIN_MCLR
+   'Pin2' BIT_CS0
    
-choice 'CLK Pin'			\
+choice 'CS1 Pin'			\
    "Pin0 0 \
     Pin1 1 \
     Pin2 2 \
@@ -61,9 +68,9 @@ choice 'CLK Pin'			\
     Pin5 5 \
     Pin6 6 \
     Pin7 7" \
-   'Pin6' PIN_CLK
+   'Pin3' BIT_CS1
    
-choice 'DATA Pin'			\
+choice 'CS2 Pin'			\
    "Pin0 0 \
     Pin1 1 \
     Pin2 2 \
@@ -72,17 +79,43 @@ choice 'DATA Pin'			\
     Pin5 5 \
     Pin6 6 \
     Pin7 7" \
-   'Pin7' PIN_DATA
+   'Pin4' BIT_CS2
+   
+choice 'CS3 Pin'			\
+   "Pin0 0 \
+    Pin1 1 \
+    Pin2 2 \
+    Pin3 3 \
+    Pin4 4 \
+    Pin5 5 \
+    Pin6 6 \
+    Pin7 7" \
+   'Pin5' BIT_CS3
+   
+choice 'RW Pin'			\
+   "Pin0 0 \
+    Pin1 1 \
+    Pin2 2 \
+    Pin3 3 \
+    Pin4 4 \
+    Pin5 5 \
+    Pin6 6 \
+    Pin7 7" \
+   'Pin6' BIT_RW
 
-comment "fixing hardwareproblems in software"
+comment "pin number on Rdim Port"
 
+   
+choice 'RDim Pin'			\
+   "Pin0 0 \
+    Pin1 1 \
+    Pin2 2 \
+    Pin3 3 \
+    Pin4 4 \
+    Pin5 5 \
+    Pin6 6 \
+    Pin7 7" \
+   'Pin4' BIT_RDIM
 
-bool "reverse cols" REVERSE_COLS n
-bool "invert rows " INVERT_ROWS n
-
-comment "for borg jacket"
-
-bool "interlaced rows" INTERLACED_ROWS n
-bool "interlaced cols" INTERLACED_COLS n
 
 endmenu