diff --git a/borg_hw/config_pingpong.in b/borg_hw/config_pingpong.in
index ef3f46b..76ade7a 100644
--- a/borg_hw/config_pingpong.in
+++ b/borg_hw/config_pingpong.in
@@ -1,4 +1,88 @@
 mainmenu_option next_comment
-comment "PingPong port setup (missing for now)"
+comment "PingPong port setup"
+
+#define COLPORT1  PORTC
+#define COLDDR1   DDRC
+
+#define COLPORT2  PORTD
+#define COLDDR2   DDRD
+
+#// Der andere Port übernimmt die Steuerung der Schieberegister
+#define ROWPORT PORTB
+#define ROWDDR   DDRB
+#// Clock und reset gehen gemeinsam an beide Schieberegister
+#// der reset pin ist negiert
+#define PIN_RST  PB2
+#define PIN_CLK  PB3
+#//das dier sind die individuellen Dateneingänge für die Schieberegister
+#define PIN_SHFT1 PB4
+
+
+choice 'Column Port 1 (right)'			\
+   "PORTA  PORTA \
+    PORTB  PORTB \
+    PORTC  PORTC \
+    PORTD  PORTD" \
+   'PORTC' COLPORT1 
+
+choice 'Column Port 2 (left)'			\
+   "PORTA  PORTA \
+    PORTB  PORTB \
+    PORTC  PORTC \
+    PORTD  PORTD" \
+   'PORTA' COLPORT2 
+
+choice 'port for row shiftregisters'			\
+   "PORTA  PORTA \
+    PORTB  PORTB \
+    PORTC  PORTC \
+    PORTD  PORTD" \
+   'PORTD' ROWPORT
+
+comment "pin numbers on shiftregister port"
+
+choice '/MCLR Pin'			\
+   "Pin0 0 \
+    Pin1 1 \
+    Pin2 2 \
+    Pin3 3 \
+    Pin4 4 \
+    Pin5 5 \
+    Pin6 6 \
+    Pin7 7" \
+   'Pin4' PIN_MCLR
+   
+choice 'CLK Pin'			\
+   "Pin0 0 \
+    Pin1 1 \
+    Pin2 2 \
+    Pin3 3 \
+    Pin4 4 \
+    Pin5 5 \
+    Pin6 6 \
+    Pin7 7" \
+   'Pin6' PIN_CLK
+   
+choice 'DATA Pin'			\
+   "Pin0 0 \
+    Pin1 1 \
+    Pin2 2 \
+    Pin3 3 \
+    Pin4 4 \
+    Pin5 5 \
+    Pin6 6 \
+    Pin7 7" \
+   'Pin7' PIN_DATA
+
+comment "fixing hardwareproblems in software"
+
+
+bool "reverse cols" REVERSE_COLS n
+bool "invert rows " INVERT_ROWS n
+
+comment "for borg jacket"
+
+bool "interlaced rows" INTERLACED_ROWS n
+bool "interlaced cols" INTERLACED_COLS n
 
 endmenu